Florent Kermarrec
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21d38701df
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soc: fix build_time format
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2020-02-11 13:23:53 +01:00 |
Florent Kermarrec
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b43d830fda
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soc/add_sdram: simplify L2 Cache, use FullMemoryWE on L2 Cache by default (seems better on all devices)
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2020-02-11 09:30:45 +01:00 |
Florent Kermarrec
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ea8e745ac2
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soc_core/common: move old mem_decoder to soc_core, simplify get_version
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2020-02-11 08:44:23 +01:00 |
Florent Kermarrec
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5e11e8391f
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tools/litex_sim_new: switch to dynamically allocated ethmac origin
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2020-02-10 19:37:53 +01:00 |
Florent Kermarrec
|
dd0c71d7a1
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soc/SoCRegion/Decoder: pass bus to decoder and remove mask on origin
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2020-02-10 19:34:18 +01:00 |
Florent Kermarrec
|
e8e4537e14
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soc/add_sdram: avoid L2 cache when l2_cache_size == 0.
|
2020-02-10 19:02:44 +01:00 |
Florent Kermarrec
|
dcbdb73231
|
soc: remove unneeded \n
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2020-02-10 18:38:59 +01:00 |
Florent Kermarrec
|
0f1811fb51
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tools/litex_sim_new: use new bus/csr/irq methods
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2020-02-10 18:21:41 +01:00 |
Florent Kermarrec
|
d320be8ecb
|
soc: use io_regions for alloc_region
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2020-02-10 18:19:35 +01:00 |
Florent Kermarrec
|
9ac09ddde5
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tools: add litex_sim_new based on SoCCore and using add_sdram method
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2020-02-10 18:00:46 +01:00 |
Florent Kermarrec
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cbcd953dd7
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soc_core: use add_rom
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2020-02-10 17:43:29 +01:00 |
Florent Kermarrec
|
487ac3da9a
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soc/add_cpu: simplify CPUNone integration
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2020-02-10 17:40:46 +01:00 |
Florent Kermarrec
|
f7d4648ca1
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soc/SoCBusHandler: add add_adapter method and use it to convert Master/Slave before connecting to the Bus
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2020-02-10 17:17:31 +01:00 |
Florent Kermarrec
|
379d47a843
|
soc/add_sdram: add sdram csr
|
2020-02-10 17:02:20 +01:00 |
Florent Kermarrec
|
3921b6345c
|
soc/add_sdram: fix rocket, shorten comments
|
2020-02-10 16:55:15 +01:00 |
Florent Kermarrec
|
14b627b466
|
soc/add_sdram: improve API
|
2020-02-10 16:38:20 +01:00 |
Florent Kermarrec
|
1faefdc0fa
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soc: add LiteXSoC class and mode add_identifier/uart/sdram to it
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2020-02-10 16:28:11 +01:00 |
Florent Kermarrec
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11dbe19084
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soc_core/sdram: cleanup, add disclaimer
|
2020-02-10 16:21:21 +01:00 |
Florent Kermarrec
|
5eb88cd904
|
soc: add add_sdram
|
2020-02-10 16:01:19 +01:00 |
Florent Kermarrec
|
39011593ac
|
soc: add csr_regions, update copyright
|
2020-02-10 15:11:37 +01:00 |
Florent Kermarrec
|
d2b069516a
|
soc: add cpu rom/sram check
|
2020-02-10 14:48:46 +01:00 |
Florent Kermarrec
|
de100fddf5
|
soc: add SOCIORegion and manage it
|
2020-02-10 14:36:53 +01:00 |
Florent Kermarrec
|
6b8c425f9b
|
soc: reorder main components/peripherals
|
2020-02-10 13:07:09 +01:00 |
Florent Kermarrec
|
84b5df7871
|
soc: add add_cpu method
|
2020-02-09 21:56:32 +01:00 |
Florent Kermarrec
|
b676a559fd
|
soc: fix unit-tests
|
2020-02-09 19:01:03 +01:00 |
Florent Kermarrec
|
0a5883901a
|
soc: integrate constants/build
|
2020-02-08 22:08:37 +01:00 |
Florent Kermarrec
|
014d5a56a8
|
soc: show sorted regions (by origin) / locs
|
2020-02-08 21:34:26 +01:00 |
Florent Kermarrec
|
c69b6b7c12
|
soc: simplify color theme
|
2020-02-08 21:30:34 +01:00 |
Florent Kermarrec
|
3cb90297ac
|
soc: add add_uart method
|
2020-02-08 10:19:18 +01:00 |
Florent Kermarrec
|
e5cacb8bbd
|
soc_core: cleanup imports
|
2020-02-07 23:16:29 +01:00 |
Florent Kermarrec
|
33d498b826
|
soc_core: get_csr_address no longer used
|
2020-02-07 23:11:08 +01:00 |
Florent Kermarrec
|
1feff1d7d5
|
soc: integrate CSR master/interconnect/collection and IRQ collection
|
2020-02-07 19:50:35 +01:00 |
Florent Kermarrec
|
3ba7c29ed9
|
soc: add add_constant/add_config methods
|
2020-02-07 19:09:54 +01:00 |
Florent Kermarrec
|
29bbe4c02a
|
soc: add add_csr_bridge method
|
2020-02-07 18:49:20 +01:00 |
Florent Kermarrec
|
b84c291c34
|
soc: add add_controller/add_identifier/add_timer methods
|
2020-02-07 18:31:50 +01:00 |
Florent Kermarrec
|
9445c33e9d
|
soc: add add_ram/add_rom methods
|
2020-02-07 16:06:32 +01:00 |
Florent Kermarrec
|
e5a8ac1dab
|
soc: add automatic bus data width convertion to add_master/add_slave
|
2020-02-07 15:31:59 +01:00 |
Florent Kermarrec
|
8f67f1157d
|
soc/soc_core: cleanup, remove some unused attributes
|
2020-02-07 15:19:02 +01:00 |
Florent Kermarrec
|
2c6e5066a7
|
soc: move SoCController from soc_core to soc
|
2020-02-07 14:52:53 +01:00 |
Florent Kermarrec
|
848fa20d1e
|
soc: create SoCLocHandler and use it to simplify SoCCSRHandler and SoCIRQHandler
|
2020-02-07 13:25:54 +01:00 |
Florent Kermarrec
|
39458c92eb
|
soc: add use_loc_if_exists on SoCIRQ.add to use current location is already defined
|
2020-02-06 19:50:44 +01:00 |
Florent Kermarrec
|
1eff0799a4
|
soc: add use_loc_if_exists on SoCCSR.add to use current location is already defined
|
2020-02-06 18:50:17 +01:00 |
Florent Kermarrec
|
8bc420679a
|
soc/integration: initial adaptation to new SoC class
|
2020-02-06 18:21:13 +01:00 |
Florent Kermarrec
|
6baa07a69b
|
soc/integration: add new soc class prorotype with SoCRegion/SoCBus/SoCCSR/SoCIRQ/SoC
|
2020-02-06 11:06:41 +01:00 |
Florent Kermarrec
|
9b11e9192d
|
cpu/vexriscv: update submodule
|
2020-02-06 10:50:35 +01:00 |
Sean Cross
|
ae085782ae
|
doc: add lxsocdoc.md (README from lxsocdoc repository)
|
2020-02-05 11:06:57 +01:00 |
enjoy-digital
|
5ff02e23a0
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Merge pull request #375 from xobs/add-lxsocdoc
Add lxsocdoc
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2020-02-05 10:15:21 +01:00 |
Florent Kermarrec
|
1944d8d9d0
|
bios/main: add LiteX tagline
|
2020-02-04 19:14:23 +01:00 |
enjoy-digital
|
40cddca933
|
Merge pull request #376 from antmicro/build-sim-do-not-override-C-LD-FLAGS
build/sim: allow to use environment's {C,LD}FLAGS
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2020-02-04 18:19:33 +01:00 |
Mariusz Glebocki
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90fe585003
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build/sim: allow to use environment's {C,LD}FLAGS
There are use cases where additional flags should be added to CFLAGS or
LDFLAGS, e.g. when using Conda environment.
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2020-02-04 17:31:31 +01:00 |