b7e4507686
core/cpu/CPUNone: set endianness to little.
2020-07-10 10:42:00 +02:00
0eb1f88bb4
Merge pull request #585 from FFY00/more-gcc
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cpu: add a few missing GCC toolchains
2020-07-09 09:34:22 -07:00
235e8cf62b
cpu: add a few missing GCC toolchains
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This names are used by Arch Linux for eg.
Signed-off-by: Filipe Laíns <lains@archlinux.org>
2020-07-09 15:58:33 +01:00
5ebdfd9307
liblitesdcard/sdcard: clamp divider value.
2020-07-09 13:09:36 +02:00
23085cffea
Merge pull request #584 from ozbenh/memtest
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Memtest/memspeed improvements
2020-07-09 12:54:42 +02:00
5c332e4b58
cores/dma: add stream.last support on WishboneDMAReader.
2020-07-09 12:18:09 +02:00
83d24d087d
memspeed: Write a fixed value
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Otherwise we have at least an extra addition in the loop
which squews the result compared to the read loop.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-07-08 17:13:37 +10:00
146ead4c4c
buid/io/InferedSDRIO/InferedSDRTristate: avoid unnecessary clk_domain/limitation.
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Just create a local clk_domain from clk signal.
2020-07-08 08:33:52 +02:00
b54b3b3362
interconnect/avalon: minor cleanup, remove max on SyncFIFO depth.
2020-07-08 07:53:42 +02:00
c0b948d4f9
memtest: Fix memspeed access size
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The move to libbase reverted the type of the pointer
from long to int.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-07-08 13:21:45 +10:00
798b3d7ba4
memtest: Fix integer size/type printf errors
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In a couple of places, memtest uses %x to print a pointer which
is illegal (and could be problematic on 64-bit). Use %p instead.
Additionally, use %ld when printing longs
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-07-08 13:17:48 +10:00
8af4e05c7f
software/litesdcard: use new clocking and use slow clock during initialization.
2020-07-07 19:59:50 +02:00
52f36b1257
integration/soc/sdcard: cleanup emulator integration, fix sim.
2020-07-07 15:05:07 +02:00
7602977c16
integration/soc: move pads.rst control to PHY.
2020-07-07 14:58:06 +02:00
51f2e6ce64
build/io/InferedSDRTristate: pass clock domain to SDROutput/SDRInput.
2020-07-07 12:11:47 +02:00
23dfefb9be
software/liblitesdcard: improve sdcard_init and handle errors.
2020-07-07 11:03:26 +02:00
8d76509032
litesdcard: use new Block2Mem/Mem2Block DMAs.
2020-07-07 09:24:08 +02:00
eeea30eada
litex/gen: remove io that has been replaced with litex/build/io (and should have been removed).
2020-07-07 08:14:42 +02:00
0a3095ead2
Merge pull request #583 from gsomlo/gls-sdcard-timeout
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liblitesdcard/sdcard: adjust card-ready timeout
2020-07-07 08:06:55 +02:00
6fdb36b84a
liblitesdcard/sdcard: adjust card-ready timeout
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Testing on nexys4ddr and rocket, approximately 12 iterations of the
timeout loop (using `busy_wait(1)`) are needed to receive a "ready"
response from the SDcard, assuming a "warm" reset where the card has
already been previously initialized.
If the SDcard is ejected and re-inserted, or if the board is "cold-reset"
(e.g., reprogrammed via openocd vs. a simple push of the reset button),
it takes approximately 450 iterations before the SDCard responds with a
"ready" message.
In either case, a timeout of 10 is insufficient. This patch increases
the busy-wait to 10, and the timeout loop counter to 128, which should
cover most cases.
Additionally, make a few minor cosmetic improvements.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2020-07-06 17:38:07 -04:00
e473c6f29e
liblitesdcard/sdcard: add timeout when waiting card to be ready.
2020-07-06 20:07:20 +02:00
31d4d7c22c
liblitesdcard/sdcard: use new SDClocker enable CSR.
2020-07-06 18:59:28 +02:00
f0a97791a9
interconnect/csr_bus: move/rewrite paged access warning.
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Was incorrectly triggered with csr_data_width=32.
2020-07-06 12:26:24 +02:00
9e46195299
interconnect/csr_bus: remove 64-bit CSR bus alignment support (no longer supported in SoCs).
2020-07-06 09:51:32 +02:00
527798f734
Merge pull request #582 from gsomlo/gls-minor-fixup
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Minor sdcard fixes
2020-07-05 10:06:01 +02:00
c52731d1f1
liblitesdcard/sdcard: return error code outside '#ifdef SDCARD_DEBUG'
2020-07-04 15:24:05 -04:00
499d291daa
liblitesdcard/sdcard: cosmetic: fix indentation, eliminate redundant counter
2020-07-04 15:22:28 -04:00
2bfa372b7c
targets: remove sdcard clock domain (now generated in the PHY).
2020-07-03 20:11:05 +02:00
31a9273c6d
litesdcard: use new clocker.
2020-07-03 20:06:42 +02:00
ee8da87e41
liblitesdcard/sdcard: use new register names and new software initalization register.
2020-07-03 19:30:06 +02:00
e6b94b1663
interconnect/stream: allow empty description/payload on Endpoint.
2020-07-03 19:29:05 +02:00
2f6b27da23
litelitesdcard/sdcard: remove wait workaround and replace remove SDCARD_MULTIPLE_BLOCK_SUPPORT define (replace it with SDCARD_CMD23_SUPPORT).
2020-07-03 18:48:43 +02:00
94821cb73c
litesdcard: update integration.
2020-07-03 14:57:40 +02:00
2c53f9b2ff
interconnect/stream: add ClockDomainCrossing wrapper around AsyncFIFO.
2020-07-03 14:39:31 +02:00
23a95bea1d
integration/soc/etherbone: always run ethcore in eth_tx clock domain and remove clock_domain parameter.
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This avoid issues when sys_clk_freq < eth_tx clock like sys_clk_freq < 125MHz with 1Gbps link.
2020-07-02 11:38:54 +02:00
4575a11748
Merge pull request #581 from antmicro/i2s_tx_fix
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i2s: Fix the incorrect TX fifo almost empty offset
2020-07-01 15:27:06 +02:00
16a0aebcad
i2s: Fix the incorrect TX fifo almost empty offset
2020-07-01 13:32:53 +02:00
8f204e7797
sdcard: rename cd_sdcard to cd_sd to avoid unnecessary clock domain.
2020-07-01 12:50:24 +02:00
42bfb90f14
liblitesdcard/sdcard: add SDCARD_MULTIPLE_BLOCK_SUPPORT define.
2020-07-01 12:40:23 +02:00
e492e96bf7
integration/soc/add_sdcard: update SDEmulator.
2020-07-01 12:39:56 +02:00
996e9a9180
tools/litex_sim: cleanup cpu endianness.
2020-07-01 09:47:10 +02:00
1c631ceeee
Merge pull request #580 from Dolu1990/patch-2
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Improve verilator compilation speed
2020-07-01 08:37:03 +02:00
949a8e73c2
boards/platforms/versa_ecp5: fix mising update.
2020-07-01 08:35:54 +02:00
c0dba18d59
tools/litex_crossover_uart: add host argument to connect to a remote server.
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example: litex_server over PCIe running on a remote machine and create virtual uart on our local machine.
2020-06-30 19:19:00 +02:00
6fe4994f66
targets: add identifier on all targets and update Versa ECP5.
2020-06-30 18:32:11 +02:00
5713c21017
tools/remote/comm_pcie: use ctypes.c_uint32 to do 32-bit accesses and avoid double writes/reads.
2020-06-30 14:12:35 +02:00
68297fce9e
tools/litex_crossover_uart: add base_address argument (required when wishbone translation).
2020-06-30 14:11:27 +02:00
b455a81678
Improve verilator compilation speed
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by asking verilator to split the C++ model into multiple files.
2020-06-30 10:38:26 +02:00
54598ed2f8
software/bios/Makefile: fix #578 merge. (get back #579 ).
2020-06-29 17:01:36 +02:00
7beffba187
software/libbase/memtest: fix bus errors reporting.
2020-06-29 16:46:03 +02:00
Florent Kermarrec
Tim Ansell
Filipe Laíns
Benjamin Herrenschmidt
Gabriel Somlo
Pawel Sagan
Dolu1990