Commit Graph

Select branches

Hide Pull Requests

Dolu1990-patch-1

allows_clk_name_override

ci-cpus

ci-cva6

ci-dev-test

ci-openrisc

ctu-can-fd

dma_nax

efinix_fixes

efinix_fixes2

export_csr_c_rework

framebuffer_change

generic_toolchain

ghdl_fix

gowin_emcu_uart

hyperbus_2x

hyperbus_io_regs

hyperbus_variable_latency

hyperram_decoupling

hyperram_new

kianv

liteeth_wishbone_tx_rx_buses

master

multi-channel-pwm

naxriscv-merge

naxriscv_update

neorv32_litex_wrapper

neorv32_params

usb_ohci_phy_fix

verilog_improvements

verilog_improvements_2

vexriscv_smp_irqs

video_framebuffer_skip_first_frame

video_mod_fix

wishbone_dma_ctrl

wishbone_word_byte_addressing

zynqmp_aximaster_eth_i2c_uart

#1

#10

#100

#1004

#1007

#1008

#101

#1012

#1013

#1015

#1016

#1017

#1019

#1020

#1021

#1022

#1023

#1024

#1028

#1030

#1032

#1033

#1035

#1037

#1038

#1039

#1040

#1041

#1043

#1044

#1046

#1050

#1051

#1052

#1053

#1054

#1055

#1057

#1058

#106

#1061

#1065

#1066

#1067

#1068

#1069

#1070

#1071

#1072

#1074

#1075

#1076

#1078

#1079

#108

#1080

#1082

#1087

#1088

#1089

#109

#1090

#1091

#1092

#1093

#1094

#1098

#11

#1100

#1102

#1103

#1104

#1104

#1111

#1113

#1114

#1115

#1116

#1117

#112

#1121

#1123

#1124

#1125

#1126

#1128

#1129

#113

#1130

#1131

#1132

#1134

#1135

#1136

#1137

#1138

#1139

#114

#1140

#1141

#1143

#1144

#1145

#1148

#1151

#1153

#1155

#1156

#1157

#1159

#116

#1160

#1161

#1162

#1165

#1166

#1167

#1169

#1170

#1171

#1172

#1173

#1176

#1177

#1178

#1179

#118

#1180

#1183

#1184

#1185

#1186

#1187

#1188

#1189

#1189

#1190

#1191

#1193

#1195

#1196

#1197

#1199

#12

#120

#1201

#1203

#1207

#1208

#121

#1213

#1214

#1218

#1218

#122

#1221

#1222

#1223

#1224

#1225

#1226

#1227

#1228

#1229

#123

#1230

#1232

#1234

#1235

#1235

#1236

#124

#1245

#1246

#1248

#1249

#125

#1250

#1251

#1254

#1255

#1256

#1258

#1259

#126

#1262

#1265

#1267

#127

#1273

#1274

#1275

#1276

#1277

#1278

#1278

#1279

#128

#1281

#1282

#1283

#1283

#1284

#1286

#1286

#1287

#1288

#129

#1290

#1292

#1293

#1294

#13

#130

#1300

#1301

#1302

#1303

#1304

#1305

#1307

#1308

#1308

#1309

#131

#1310

#1310

#1311

#1311

#1315

#1315

#1316

#1317

#1318

#1318

#1321

#1322

#1322

#1323

#1324

#1325

#1326

#1328

#1329

#1331

#1333

#1334

#1335

#1336

#1336

#1338

#1340

#1346

#1347

#135

#1352

#1355

#1356

#1358

#1359

#1360

#1361

#1361

#1362

#1367

#1369

#1374

#1375

#1376

#1378

#1379

#138

#1380

#1381

#1383

#1384

#1385

#1386

#1387

#1388

#1389

#1390

#1391

#1392

#1393

#1395

#14

#1401

#1402

#1403

#1405

#1406

#1409

#141

#1410

#1412

#1413

#1414

#1414

#1418

#1423

#1425

#1426

#1430

#1430

#1433

#1434

#1435

#1436

#1437

#1438

#144

#1440

#1442

#1444

#1446

#1447

#1448

#1449

#1450

#1453

#1456

#1458

#1460

#1465

#1467

#1470

#1472

#1473

#1473

#1474

#1475

#1476

#148

#1480

#1481

#1482

#1484

#1485

#1486

#1487

#1488

#1489

#149

#1490

#1493

#1494

#1495

#1496

#1497

#1499

#15

#150

#1500

#1501

#1503

#1504

#1505

#1506

#1506

#1507

#1510

#1510

#1512

#1513

#1513

#1515

#1517

#1518

#1519

#152

#1520

#1521

#1522

#1522

#1524

#1526

#1527

#1528

#1528

#1529

#153

#1531

#1535

#1537

#1538

#1539

#1539

#154

#1540

#1541

#1543

#1546

#1547

#1548

#1549

#155

#1551

#1553

#1558

#1559

#156

#1560

#1561

#1563

#1564

#1566

#157

#1571

#1572

#1574

#1575

#1579

#158

#1580

#1581

#1586

#1586

#1594

#1595

#1597

#1598

#16

#1602

#161

#1613

#1616

#1617

#162

#1625

#1627

#1629

#163

#1631

#1632

#1634

#1634

#1636

#1638

#164

#1641

#1641

#1643

#1646

#1647

#1648

#165

#1650

#1651

#1653

#1654

#1655

#1656

#1657

#1659

#1659

#166

#1662

#167

#1670

#1671

#1673

#1674

#1677

#168

#1683

#1684

#1685

#1689

#169

#1690

#1691

#1692

#1693

#1697

#1699

#17

#170

#1702

#171

#1710

#1713

#1715

#1718

#172

#1720

#1721

#1724

#1728

#1729

#173

#1730

#1733

#1735

#1735

#1736

#1737

#1738

#174

#1740

#1740

#1741

#1742

#1743

#1744

#1745

#1747

#1748

#1749

#175

#1751

#1752

#1755

#1757

#1757

#1758

#1759

#1759

#176

#1760

#1762

#1763

#1764

#1767

#1768

#1769

#1775

#1775

#1776

#1778

#1779

#178

#1780

#1781

#1781

#1782

#1786

#1787

#1789

#179

#1790

#1790

#1791

#1791

#1795

#1797

#1799

#18

#1800

#1804

#1806

#1806

#1808

#1809

#1810

#1812

#1815

#1816

#1817

#1818

#1819

#182

#1821

#1822

#1823

#1824

#1825

#1827

#1828

#1829

#183

#1833

#1838

#184

#1840

#1843

#1845

#1845

#185

#1850

#1851

#1852

#1855

#1856

#186

#1862

#1865

#187

#1871

#1872

#1872

#1874

#1876

#1877

#1878

#188

#1881

#1884

#1885

#1886

#1887

#1888

#189

#1890

#1894

#1895

#1897

#1898

#1898

#1899

#19

#190

#1900

#1901

#1902

#1904

#1906

#1908

#1909

#191

#1911

#1912

#1913

#1913

#1915

#1915

#1916

#1918

#1919

#192

#1921

#1921

#1923

#1925

#1926

#1928

#1928

#1929

#193

#1932

#1936

#1937

#1938

#1939

#194

#1940

#1941

#1942

#1942

#1943

#1943

#1944

#1944

#1945

#1946

#1948

#1949

#195

#1951

#1952

#1953

#1954

#1955

#1956

#1958

#1959

#1959

#196

#1961

#1962

#1964

#1966

#1968

#1969

#197

#1971

#1972

#1973

#1974

#1974

#1975

#1975

#1978

#198

#1983

#1984

#1985

#1989

#1989

#199

#1990

#1990

#1991

#1992

#1993

#1994

#1995

#1996

#1997

#1998

#1999

#2

#20

#200

#2001

#2003

#2004

#2005

#2006

#2007

#2009

#201

#2011

#2012

#2016

#2017

#2018

#2019

#2019

#202

#2021

#2022

#2022

#2024

#2026

#2026

#2028

#203

#2030

#2033

#2035

#2036

#204

#2042

#2043

#2044

#2045

#2046

#2047

#2047

#2048

#2050

#2053

#2055

#2056

#2057

#2058

#2059

#206

#2060

#2063

#2065

#2066

#2068

#2068

#2069

#2070

#2070

#2073

#2073

#21

#210

#214

#216

#217

#218

#219

#22

#221

#222

#223

#235

#24

#240

#241

#243

#244

#246

#247

#25

#251

#252

#253

#254

#255

#257

#259

#26

#260

#261

#262

#263

#264

#266

#269

#27

#270

#271

#272

#274

#275

#276

#277

#278

#28

#280

#282

#283

#284

#285

#286

#29

#29

#293

#297

#30

#300

#302

#304

#305

#306

#307

#308

#309

#31

#310

#311

#312

#313

#315

#319

#32

#320

#321

#324

#326

#327

#328

#330

#331

#332

#336

#337

#338

#339

#34

#340

#349

#35

#351

#354

#357

#358

#359

#36

#360

#363

#366

#369

#37

#370

#373

#374

#375

#376

#378

#38

#380

#381

#382

#383

#386

#387

#389

#39

#390

#393

#395

#396

#397

#399

#40

#400

#401

#402

#403

#405

#408

#41

#410

#411

#412

#416

#418

#419

#42

#421

#422

#423

#424

#425

#426

#427

#429

#43

#430

#431

#432

#433

#434

#435

#436

#437

#439

#44

#440

#441

#442

#444

#445

#446

#447

#448

#45

#450

#451

#452

#458

#459

#462

#464

#467

#469

#47

#470

#472

#473

#474

#475

#476

#477

#478

#48

#481

#482

#483

#484

#485

#487

#488

#49

#490

#491

#492

#494

#496

#499

#5

#5

#50

#50

#500

#502

#503

#504

#505

#506

#507

#508

#509

#51

#510

#511

#513

#514

#516

#517

#518

#519

#52

#521

#523

#524

#526

#527

#53

#530

#531

#533

#534

#535

#536

#537

#538

#539

#541

#542

#543

#545

#547

#549

#55

#55

#550

#551

#552

#553

#555

#556

#557

#558

#559

#56

#562

#563

#564

#565

#567

#568

#569

#57

#570

#573

#574

#575

#576

#578

#579

#58

#580

#581

#582

#583

#584

#585

#587

#588

#59

#592

#593

#594

#595

#597

#598

#599

#60

#600

#602

#603

#604

#605

#606

#607

#61

#610

#611

#615

#617

#619

#620

#621

#622

#623

#624

#625

#626

#627

#63

#631

#632

#634

#635

#636

#637

#639

#64

#640

#642

#643

#644

#647

#649

#65

#650

#651

#652

#653

#654

#655

#656

#657

#659

#66

#661

#662

#663

#664

#665

#666

#668

#67

#671

#672

#673

#674

#675

#677

#678

#679

#68

#680

#681

#684

#688

#689

#69

#690

#691

#692

#696

#699

#7

#70

#70

#700

#701

#702

#703

#704

#705

#706

#707

#708

#709

#71

#711

#713

#714

#716

#718

#719

#72

#721

#722

#724

#725

#727

#729

#731

#732

#734

#735

#736

#737

#738

#742

#745

#747

#749

#75

#750

#754

#76

#76

#761

#762

#768

#77

#772

#774

#775

#776

#777

#777

#778

#78

#780

#781

#782

#784

#787

#788

#789

#79

#790

#791

#792

#793

#794

#795

#796

#797

#799

#80

#800

#801

#803

#805

#806

#807

#808

#809

#81

#810

#811

#813

#815

#816

#818

#819

#820

#821

#822

#823

#824

#830

#832

#833

#836

#838

#840

#841

#843

#845

#846

#847

#849

#850

#852

#853

#854

#857

#858

#859

#86

#860

#863

#864

#865

#866

#867

#868

#871

#872

#873

#874

#875

#877

#879

#88

#880

#881

#884

#885

#886

#887

#891

#892

#895

#896

#897

#899

#899

#9

#900

#901

#902

#904

#905

#906

#908

#91

#910

#911

#915

#916

#917

#918

#92

#920

#923

#924

#926

#926

#927

#93

#930

#931

#932

#936

#94

#940

#941

#942

#943

#945

#947

#948

#949

#95

#952

#953

#956

#957

#958

#96

#961

#962

#964

#965

#967

#969

#970

#975

#976

#977

#978

#978

#979

#98

#980

#986

#987

#988

#99

#992

#993

#994

#995

#998

2020.04

2020.08

2020.12

2021.04

2021.08

2021.12

2022.04

2022.08

2022.12

2023.04

2023.08

2023.12

2024.04

Mono Color

• 2d52c65613
  Simple mistake fix Dmitry 2024-05-18 19:09:13 +0000
• 5eeb999694 update vexii Dolu1990 2024-05-18 16:59:27 +0200
• 8c0f5447ed fix nax/vexii git checkout process, thanks JoyBed Dolu1990 2024-05-18 10:01:29 +0200
• 4b3f147fc8 CHANGES: Update. Florent Kermarrec 2024-05-17 12:57:29 +0200
• d5f9d57c2b
  Merge pull request #1956 from enjoy-digital/zynqmp_aximaster_eth_i2c_uart enjoy-digital 2024-05-17 12:54:06 +0200
• 943c0c263d soc/cores/cpu/zynqmp/core.py: added method to enable ZynqMP UART interface in EMIO mode zynqmp_aximaster_eth_i2c_uart Gwenhael Goavec-Merou 2024-05-17 11:02:41 +0200
• 49488e5e01 soc/cores/cpu/zynqmp/core.py: added method to enable ZynqMP i2c interface in EMIO mode Gwenhael Goavec-Merou 2024-05-17 11:02:31 +0200
• e95edaf9be soc/cores/cpu/zynqmp/core.py: added method to enable ZynqMP ethernet interface in EMIO mode (with gmii_to_rgmii) Gwenhael Goavec-Merou 2024-05-17 11:02:16 +0200
• 1986b79b9a soc/cores/cpu/zynqmp/core.py: add_axi_gp_master: removed loop over layout to have a more clear / easy to maintain connexion Gwenhael Goavec-Merou 2024-05-17 11:02:02 +0200
• c5592ca8da soc/cores/cpu/zynqmp/core.py: allows user to specify default configuration (preset) with a tcl file Gwenhael Goavec-Merou 2024-05-17 11:01:46 +0200
• 0720ffb404 Update vexii Dolu1990 2024-05-17 10:00:24 +0200
• 882463d9db
  Merge pull request #1955 from Dolu1990/nax64_irq enjoy-digital 2024-05-17 08:20:46 +0200
• 122e060a5e update vexii Dolu1990 2024-05-16 19:30:15 +0200
• 74b300597b cpu/naxriscv: fix 64 bits IRQ support Dolu1990 2024-05-16 18:59:40 +0200
• 60b0273eda Add baremetal IRQ support Dolu1990 2024-05-16 18:58:16 +0200
• 57f74da8d8 Merge branch 'master' into vexiiriscv Dolu1990 2024-05-16 16:17:21 +0200
• d7b4c7bc9c
  Merge pull request #1954 from enjoy-digital/vexriscv_smp_irqs enjoy-digital 2024-05-16 10:55:12 +0200
• fbf03ec74c inteconnect/axi_lite/wishbone SRAM: Switch back to LiteXModule and add autocsr_exclude on mem to avoid AutoCSR to collect it. Florent Kermarrec 2024-05-16 10:36:07 +0200
• c0d9224f09 integration/export/_generate_csr_header_includes_c: Fix refactoring issue and do not include generated/soc.h when access functions are disabled. Florent Kermarrec 2024-05-16 09:19:18 +0200
• d4c1a10817 cores/cpu/naxriscv: Add baremetal IRQ support vexriscv_smp_irqs Dolu1990 2024-05-14 14:57:29 +0200
• e03b097e8e software/libbase/isr.c: Simplify using __riscv_plic__ define. Florent Kermarrec 2024-05-14 14:47:01 +0200
• c79e1ef95f cores/cpu/vexriscv_smp: Remove FIXME/CHECKME now that working and remove UART_POLLING flag. Florent Kermarrec 2024-05-14 14:43:57 +0200
• 786c929f08 cores/cpu/vexriscv_smp: fix PLIC_EXT_IRQ_BASE Dolu1990 2024-05-14 14:24:37 +0200
• 8a83585b85
  Merge pull request #1953 from enjoy-digital/export_csr_c_rework enjoy-digital 2024-05-14 12:54:48 +0200
• 8eaa53ae9a test/test_cpu: Disable cv32e40p test (need to update/wait for pythondata to be updated). Florent Kermarrec 2024-05-14 12:53:09 +0200
• c810b89464
  Merge pull request #1951 from nuntipat/update-cv32e40p enjoy-digital 2024-05-14 12:11:50 +0200
• 9b6e231a1a
  Merge pull request #1952 from nuntipat/fix-csr-def-cv32e41p enjoy-digital 2024-05-14 12:08:42 +0200
• 46911d5078 soc/integration/builder: Disable fields_access_functions generation by default since not widely used (at least not in LiteX "official" projects). export_csr_c_rework Florent Kermarrec 2024-05-14 11:59:13 +0200
• 2574cc1ddc integration/export: Fix read_function refactoring. Florent Kermarrec 2024-05-14 11:55:34 +0200
• 7b7334fc17 cpu/vexiiriscv update Dolu1990 2024-05-14 11:41:21 +0200
• 29bb397bb6 soc/integration/export: Add parameter to enable/disable fields access function generation. Florent Kermarrec 2024-05-14 11:17:54 +0200
• 9f4bd5cec8 integration/export: Split get_csr_header in simpler functions. Florent Kermarrec 2024-05-14 11:00:41 +0200
• c42cc350c6 integration/export: Split _get_rw_functions_c in simpler functions. Florent Kermarrec 2024-05-14 10:47:38 +0200
• 3506a5e82d cores/cpu/vexriscv_smp: Prepare IRQ support based on Rocket IRQ support (not yet working). Florent Kermarrec 2024-05-14 10:04:13 +0200
• 49897ee018 software/libbase/isr.c: Cleanup plic_init/isr and move PLIC_EXT_IRQ_BASE to cores/cpu/../irq.h since specific to each CPU. Florent Kermarrec 2024-05-14 10:02:56 +0200
• b0acf6136e Fix CSR register definition for the CV32E41P core Nuntipat Narkthong 2024-05-13 18:15:51 -0400
• 41564cc47b Update CV32E40P to be based on the OpenHW Group's repo Nuntipat Narkthong 2024-05-13 16:03:23 -0400
• 2613ae606a interconnect/packet/Status: Simplify logic. Florent Kermarrec 2024-05-13 17:52:24 +0200
• 8b175c2575 CHANGES: Update. Florent Kermarrec 2024-05-13 16:33:11 +0200
• 0d3a8220dd
  Merge pull request #1948 from Liamolucko/riscv-triples enjoy-digital 2024-05-07 15:15:09 +0200
• b61e8b5d42
  Merge pull request #1945 from Nicolas-Gaudin/master enjoy-digital 2024-05-07 15:13:44 +0200
• e4cfe87109
  Merge pull request #1946 from nrndda/AXILite_LitexXModule_revert enjoy-digital 2024-05-07 15:10:55 +0200
• 903c5fb9a1 handle the case when AWVALID and WVALID are not asserted at the same clock cycle Alexey Morozov 2024-05-07 13:33:04 +0200
• 588b7a9519 Update Vexii Dolu1990 2024-05-06 19:48:56 +0200
• 86a43c9ff7 integration/export: Fix get_csr_header/base_define when with_csr_base_define is set to False. Florent Kermarrec 2024-05-06 14:59:17 +0200
• e07c4fdb2a
  Add missing 32-bit variants of RISC-V target triples Liam Murphy 2024-05-04 17:28:22 +1000
• 26f5e8a149 Revert LitexModule for AXILiteSRAM as well. Follows revert d021564fca for wishbobe. Dmitry Derevyanko 2024-05-03 00:51:01 +0300
• 56366ab5d6
  Merge 1d7c738107 into 76a704377f AndrewD 2024-04-30 14:20:31 +0200
• bd0adb5be7
  Support isr for cv32e41p core Nicolas Gaudin 2024-04-30 14:07:07 +0200
• bb2284b40b When part skipped do not threat it as sent Dmitry Derevyanko 2024-04-28 21:52:55 +0300
• 8d68c1ada3 If two clock already included in false path list then swapped tuple pair of clocks won't be added. Fix this by adding temporary variable with tuple Dmitry Derevyanko 2024-04-27 01:04:37 +0300
• 76a704377f
  Merge pull request #1941 from motec-research/vexriscv_debug_halted enjoy-digital 2024-04-26 13:43:40 +0200
• 7aae2bf897
  Merge pull request #1940 from enjoy-digital/Dolu1990-patch-1 Dolu1990 2024-04-26 11:21:18 +0200
• fd477703db soc/integration/export: Revert #1938 (needs to be reviewed/discussed). Florent Kermarrec 2024-04-26 10:59:02 +0200
• bd4ca4371d
  Merge pull request #1938 from motec-research/guard_access_function AndrewD 2024-04-26 12:06:49 +1000
• 3a008b4988 cpu/vexriscv: expose o_halted Andrew Dennison 2024-04-26 10:29:45 +1000
• ea33e37b1a
  cpu/naxriscv update mBus to preserve memory accesses offset Dolu1990-patch-1 Dolu1990 2024-04-25 16:06:34 +0200
• 8831acba65 naxriscv fix simulation reset Dolu1990 2024-04-25 16:01:49 +0200
• b6bfe42b6b
  Merge pull request #1937 from motec-research/litex_term_deprecation_warning enjoy-digital 2024-04-25 11:38:09 +0200
• ac1166946c
  Merge pull request #1936 from motec-research/fix_recursive_exception enjoy-digital 2024-04-25 11:37:41 +0200
• 546f4d93ff
  Merge pull request #1939 from hansfbaier/master Gwenhael Goavec-Merou 2024-04-25 07:03:44 +0200
• d73190ac29 yosys+nextpnr: fix error message Hans Baier 2024-04-25 06:22:41 +0700
• 7481b1e161 soc/export: add guard for access_functions Andrew Dennison 2024-03-05 17:25:47 +1100
• 19db78da15 get_data_mod(): fix recursive exception reporting Andrew Dennison 2023-10-22 12:35:49 +1100
• 60d9a635ce tools/litex_term: fix DeprecationWarning Andrew Dennison 2024-02-19 14:32:54 +1100
• 1d7c738107 tools/litex_json2dts_linux: add *-endian to support csr ordering Andrew Dennison 2024-04-08 17:40:11 +1000
• ab678b42f3 soc/integration: add csr ordering support Andrew Dennison 2024-04-08 17:40:11 +1000
• d324c0e150 test/test_cpu: Disable Microwatt that seems to be broken. Florent Kermarrec 2024-04-20 08:51:10 +0200
• e4dc68206d
  Merge pull request #1932 from trabucayre/fix_openxc7 enjoy-digital 2024-04-19 13:43:31 +0200
• 7f7e44646d build/xilinx/yosys_nextpnr.py: fix device name for xc7a35ticsg324-1L & xc7a200t-sbg484-1 (as done for f4pga) Gwenhael Goavec-Merou 2024-04-19 06:57:01 +0200
• d6eeb20505 tools/litex_term: Minor cosmetic changes. Florent Kermarrec 2024-04-18 15:08:54 +0200
• c343350551 Add bios disassembly file generation rules. Dmitry Derevyanko 2024-04-16 20:32:56 +0300
• e00fe7df45 Use EventSourcePulse for fifo empty/full signals. Dmitry Derevyanko 2024-04-16 20:30:04 +0300
• 0c6ce1b313 Improve EventSource functions Dmitry Derevyanko 2024-04-16 20:25:56 +0300
• 22f4637570 Revert "Uart tx irq handling fix " (issue #554) Gwenhael Goavec-Merou 2024-04-16 14:01:38 +0200
• 3978af9c39 test/test_hyperbus: Update. Florent Kermarrec 2024-04-16 11:12:30 +0200
• a44b7944ca CHANGES: Update. Florent Kermarrec 2024-04-16 10:51:19 +0200
• fd6f913525 cores/hyperbus: Switch default latency_mode to variable. Florent Kermarrec 2024-04-16 10:19:59 +0200
• 62b9c64212 cores/hyperbus: Add status register to report configured latency_mode to software and allow corresponding configuration. Florent Kermarrec 2024-04-16 10:18:53 +0200
• 576ab24b6c
  Merge pull request #1926 from enjoy-digital/hyperbus_variable_latency enjoy-digital 2024-04-15 17:39:04 +0200
• e3d1391487
  Merge pull request #1925 from chmousset/fix_efinix_t8q144 enjoy-digital 2024-04-15 17:38:37 +0200
• ebabe82c70 software/bios/main: Rewrite HyperRAM init/config. hyperbus_variable_latency Florent Kermarrec 2024-04-15 16:03:55 +0200
• 67586e8a24 cores/hyperbus: Update docstring. Florent Kermarrec 2024-04-15 15:05:58 +0200
• d25fd85f55 cores/hyperbus: More cleanups. Florent Kermarrec 2024-04-15 14:56:08 +0200
• 2100a6bd8c cores/hyperbus: reg_buf.source -> reg_ep. Florent Kermarrec 2024-04-15 14:48:38 +0200
• 1597791fb6 cores/hyperbus: Simplify reg_write/read_done. Florent Kermarrec 2024-04-15 14:43:15 +0200
• 8e48d0d330 cores/hyperbus: Cleanup/Improve Config/Reg Interfaces. Florent Kermarrec 2024-04-15 14:33:41 +0200
• 6e00cfa9d0 cores/hyperbus: Cleanup fixed/variable latency support. Florent Kermarrec 2024-04-15 14:05:39 +0200
• 739b66a15b
  [fix] Trion T8 have a V1 PLL in BGA packages, but a V2 PLL in TQFP package. DP files varies accordingly Charles-Henri Mousset 2024-04-15 09:29:48 +0200
• 93f76ede95 bios/main: Test down to latency = 3, working. Florent Kermarrec 2024-04-15 12:06:49 +0200
• a95f1b8486 cores/hyperbus: Make latency dynamically configurable. Florent Kermarrec 2024-04-15 12:06:11 +0200
• 6216bd4e99 cores/hyperbus: Add latency_mode parameter and test different latencies/modes in simulation. Florent Kermarrec 2024-04-15 10:32:13 +0200
• f62c9927d3 Fix for simultaneous interrupt and clear. Simplify a little bit Dmitry Derevyanko 2024-04-15 08:52:34 +0300
• 33a1fcda48 software/bios: Do minimal reconfiguration for variable latency and start testing latency cycles re-configuration. Florent Kermarrec 2024-04-12 19:35:31 +0200
• f8c59c03e3 cores/hyperbus: Add variable latency support (working on ti60 f225). Florent Kermarrec 2024-04-12 18:50:19 +0200
• b192103822 cores/hyperbus: Fix bytes order on register writes. Florent Kermarrec 2024-04-12 16:06:26 +0200
• fb519ac260 test/test_hyperbus: Add test_hyperram_reg_write. Florent Kermarrec 2024-04-12 15:21:57 +0200
• a32db7abad cores/hyperbus: Add with_csr parameter to make Register interface optional. Florent Kermarrec 2024-04-12 15:21:32 +0200
• 2d1dd45fd2
  Merge pull request #1919 from nrndda/uart_tx_irq_handling_fix enjoy-digital 2024-04-12 10:45:12 +0200
• 2bc41928a3
  Merge pull request #1916 from motec-research/spi_mmap enjoy-digital 2024-04-12 10:38:05 +0200