Dolu1990
|
42e677ec0d
|
1.40 DMIPS/Mhz update
|
2018-01-29 15:24:14 +01:00 |
|
Dolu1990
|
bdbf6ecf17
|
BranchPrediction DYNAMIC_TARGET add source PC tag to only consume entries on branch instructions
|
2018-01-29 14:52:31 +01:00 |
|
Dolu1990
|
0d318ab6b9
|
Add DYNAMIC_TARGET branch prediction (1.41 DMIPS/Mhz)
Add longer timeouts in the regressions tests
|
2018-01-29 13:17:11 +01:00 |
|
Dolu1990
|
307c0b6bfa
|
Now mret and ebreak are only allowed in CSR machine mode
|
2018-01-28 16:34:55 +01:00 |
|
Dolu1990
|
93da5d29bc
|
Fix dhrystone referance log
|
2018-01-28 16:34:55 +01:00 |
Dolu1990
|
3f9c8edc4c
|
Update README.md
|
2018-01-28 13:04:59 +01:00 |
|
Dolu1990
|
a98a0f72a6
|
Update GCC information, update Murax performances
|
2018-01-27 22:02:23 +01:00 |
|
Dolu1990
|
26732942e5
|
Update DMIPS/Mhz
Add cached config with maximal performance settings
FullBarrielShifterPlugin can now be configured to do everything in the execute stage
|
2018-01-25 01:11:57 +01:00 |
|
Dolu1990
|
b3564e1b7e
|
Fix Murax script flow (without rom file)
|
2018-01-21 15:39:10 +01:00 |
|
Dolu1990
|
3b3bbd48b9
|
SpinalHDL 1.1.3 => Now Verilog rom are emited into separated bin files
|
2018-01-20 18:29:33 +01:00 |
|
Dolu1990
|
f5d5b91f7a
|
More info about eclipse debugging
|
2018-01-09 19:58:57 +01:00 |
|
Dolu1990
|
6a521a8d13
|
Better MuraxSim gui
Add MuraxSim in the readme
|
2018-01-09 08:59:17 +01:00 |
|
Dolu1990
|
9a89573942
|
SpinalHDL 1.1.2
Add Murax setup with Mul Div Barriel
|
2018-01-06 22:09:42 +01:00 |
|
Dolu1990
|
43d3ffd685
|
CsrPlugin : Now wait that the whole pipeline (including writeback) is empty before executing interruptions. This make the separation between context switching clear and avoid on atomic instructions failure
|
2018-01-04 17:37:23 +01:00 |
|
Dolu1990
|
2b7465e5df
|
Add more atomic tests (PASS)
|
2018-01-04 16:16:22 +01:00 |
|
Dolu1990
|
611f2f487f
|
Fix DataCache atomic integration into DBusCachedPlugin
Atomic is passing basic tests
|
2018-01-04 15:24:00 +01:00 |
|
Dolu1990
|
4637e6cb48
|
Fix DecodingSimplePlugin model building when reinvocation is done one a preexisting opcode.
add Atomic test flow
|
2018-01-04 14:43:30 +01:00 |
|
Dolu1990
|
468dd3841e
|
Add Atomic LR SC support to the DBusCachedPlugin via reservation entries buffer
|
2018-01-04 13:16:40 +01:00 |
|
Dolu1990
|
4ed19f2cc5
|
SpinalHDL 1.1.1
|
2017-12-30 03:36:57 +01:00 |
|
Dolu1990
|
c3d950fb13
|
Clean script folder
|
2017-12-29 13:18:14 +01:00 |
|
Dolu1990
|
0d39e38906
|
SpinalHDL 1.1.0
|
2017-12-28 13:49:39 +01:00 |
|
Dolu1990
|
a4db278655
|
Merge pull request #10 from Wallbraker/olimex
Port to iCE40HX8K-EVB
|
2017-12-27 22:31:33 +01:00 |
Jakob Bornecrantz
|
617a2948d0
|
Port to iCE40HX8K-EVB
|
2017-12-27 21:21:55 +00:00 |
|
Dolu1990
|
1b2476f217
|
Update to sbt 0.13.16
|
2017-12-24 18:20:02 +01:00 |
|
Dolu1990
|
3a913f0789
|
SpinalHDL 1.0.5
|
2017-12-22 23:18:34 +01:00 |
|
Dolu1990
|
3c0588eb4b
|
remove MuraxSim fixed path
|
2017-12-19 22:33:46 +01:00 |
|
Dolu1990
|
7f2b2181c1
|
SpinalHDL 1.0.3
|
2017-12-19 21:21:16 +01:00 |
|
Dolu1990
|
37849b7a66
|
Spinal 1.0.2 sim update
|
2017-12-19 00:40:52 +01:00 |
|
Dolu1990
|
15463a6276
|
spinalhdl 1.0.1
|
2017-12-17 19:36:18 +01:00 |
|
Dolu1990
|
f5a1793ef5
|
Merge remote-tracking branch 'origin/sim'
|
2017-12-17 17:57:51 +01:00 |
|
Dolu1990
|
ebda7526b5
|
MuraxSim 1.0.0
|
2017-12-17 17:57:09 +01:00 |
|
Dolu1990
|
dda5372a6c
|
Fix typo
|
2017-12-14 01:05:06 +01:00 |
|
Dolu1990
|
d6e0761065
|
Fix led gui refresh rate
|
2017-12-14 01:04:31 +01:00 |
|
Dolu1990
|
2259c9cb0f
|
Add SpinalHDL sim (1.0.0)
|
2017-12-14 00:57:12 +01:00 |
|
Dolu1990
|
5a8c131eb5
|
Update README.md
|
2017-12-13 13:24:43 +01:00 |
|
Dolu1990
|
5c8251d6a7
|
Update README.md
|
2017-12-13 13:23:55 +01:00 |
|
Dolu1990
|
04ca72df66
|
Update README.md
|
2017-12-05 16:29:26 +01:00 |
|
Dolu1990
|
f10dabd253
|
SpinalHDL 0.11.5 update
|
2017-12-05 15:58:05 +01:00 |
|
Dolu1990
|
e1b86ea511
|
SpinalHDL 0.11.4 update
|
2017-12-01 11:19:23 +01:00 |
|
Dolu1990
|
586d3ed286
|
Update formal VexRiscv to halt on missaligned dbus
|
2017-11-26 15:30:48 +01:00 |
|
Dolu1990
|
4de0aac469
|
Merge branch 'formal'
|
2017-11-24 14:03:25 +01:00 |
|
Dolu1990
|
b7f4f09814
|
Update verilator makefiles to support the last SpinalHDL changes (process merges)
|
2017-11-21 23:56:46 +01:00 |
|
Dolu1990
|
9b9bbaa4ad
|
Add missing full config for the iBus
|
2017-11-21 00:09:02 +01:00 |
|
Dolu1990
|
ce6fd6d0aa
|
Add VexRiscvAxi4 demo
|
2017-11-20 23:57:37 +01:00 |
|
Dolu1990
|
7c19288648
|
Update Synthesis bench
Update some synthesis results
|
2017-11-17 20:10:46 +01:00 |
|
Dolu1990
|
635417aec2
|
Merge pull request #9 from kaofishy/master
Minor fixes to Murax.scala
|
2017-11-16 21:16:53 +01:00 |
Tony Kao
|
290dbc106e
|
Fixes GPIO width mismatch
Adds explicit type to apbDecoder.slave to suppress IDE errors
|
2017-11-16 15:02:13 -05:00 |
|
Dolu1990
|
9f9ec823b8
|
SpinalHDL 0.11.2
|
2017-11-15 17:57:08 +01:00 |
|
Dolu1990
|
6c3fed3505
|
SpinalHDL 0.11.1
|
2017-11-15 16:44:42 +01:00 |
|
Dolu1990
|
be3d301eaf
|
Merge remote-tracking branch 'origin/spinalhdl_reworkDev'
|
2017-11-12 13:08:05 +01:00 |