Commit graph

752 commits

Author SHA1 Message Date
Florent Kermarrec
e946f6e453 fhdl/verilog: do not use initial begin in _printinit (not accepted by all synthesis tools ex: Synplify Pro does not accept it) 2015-03-16 23:47:07 +01:00
Florent Kermarrec
69ce6dd48c migen/genlib/io: add DDRInput and DDROutput 2015-03-16 22:47:13 +01:00
Sebastien Bourdeauducq
beeaefccea move pytholite to separate repos 2015-03-14 22:48:03 +01:00
Sebastien Bourdeauducq
c824379878 fhdl/visit: fix TransformModule 2015-03-14 17:45:11 +01:00
Sebastien Bourdeauducq
6a979a8023 mibuild: sanitize default clock management 2015-03-14 00:10:08 +01:00
Florent Kermarrec
ff266bc2ee migen/genlib/io: add DifferentialOutput and Xilinx implementation 2015-03-12 19:30:57 +01:00
Florent Kermarrec
bf28664cb4 genlib/io.py: fix copy/paste error (thanks rjo) 2015-03-12 18:49:49 +01:00
Florent Kermarrec
c8ba8cde8e migen/genlib: add io.py to define generic I/O specials to be lowered by mibuild 2015-03-12 18:38:53 +01:00
Florent Kermarrec
8e09a86e4f genlib/misc: add increment parameter to Counter 2015-03-09 20:20:25 +01:00
Florent Kermarrec
ebcea3c000 fhdl/module: use r.append() in _collect_submodules 2015-03-09 19:45:02 +01:00
Florent Kermarrec
ee1091f491 fhdl/module: avoid flushing self._submodules and create do_exit. 2015-03-09 17:17:21 +01:00
Sebastien Bourdeauducq
7b00141a0c genlib/cordic: fix typos 2015-03-06 00:47:23 +01:00
Florent Kermarrec
06f3c46e35 genlib/misc: fix missing *args in Counter 2015-03-04 23:49:15 +01:00
Florent Kermarrec
7d68ecbd86 move dma_lasmi to MiSoC 2015-03-02 08:23:02 +01:00
Florent Kermarrec
58290f3c43 lasmi: simplify usage for the user (it's the job of the controller to manage write/read latencies on acks) 2015-03-01 22:04:20 +01:00
Florent Kermarrec
8f81ae6826 genlib/misc: add FlipFlop, Counter, Timeout 2015-03-01 16:33:46 +01:00
Florent Kermarrec
e82531cdf8 move dfi/lasmibus/wishbone2lasmi to MiSoC sdram 2015-02-27 16:54:22 +01:00
Florent Kermarrec
225a2d4704 report cachesize in wishbone2lasmi 2015-02-27 14:12:13 +01:00
Florent Kermarrec
452c60e0c3 endpoints: add param_layout parameter (required to pass parameter data with converters and will allow logic optimizations) 2015-02-14 03:10:56 -08:00
Florent Kermarrec
319465445d actorlib/structuring: fix eop generation in Pack 2015-02-14 03:07:18 -08:00
Florent Kermarrec
c7eba8f4c4 remove crc since each crc is specific. It's probably better to adapt code for each case. 2015-02-14 03:01:12 -08:00
Florent Kermarrec
7471b2a152 genlib/crc: use OrderedDict 2015-01-23 00:23:41 +08:00
Florent Kermarrec
2175a79c03 fhdl/std: add FinalizeError import 2015-01-23 00:23:41 +08:00
Florent Kermarrec
037ea05b1e crc: modify CRCChecker to remove CRC and clean up 2014-12-21 17:24:52 +08:00
Sebastien Bourdeauducq
ae770c0f8c bank: support direct mapping of CSRs on Wishbone 2014-11-30 22:28:39 +08:00
Yann Sionneau
ee928a8973 Wishbone DownConverter: Fix sel signal 2014-11-26 19:33:12 +08:00
Sebastien Bourdeauducq
4542de2c11 genlib/fsm: add NextValue to replace reg/reg_next/ce pattern 2014-11-25 17:16:21 +08:00
Sebastien Bourdeauducq
5801e5746b fhdl/tools: do not attempt to rename sync clock domain if it does not exist 2014-11-21 14:51:05 -08:00
Sebastien Bourdeauducq
eb47f458dd flow: endpoint description structure with packetized parameter 2014-11-20 22:31:56 -08:00
Sebastien Bourdeauducq
f5fc4b365f actorlib/fifo: add buffered parameter 2014-11-20 18:46:54 -08:00
Jannis Harder
f847faf004 actorlib/fifo: fix no-op assignment due to .payload omission 2014-11-14 21:25:19 +01:00
Guy Hutchison
9f2f8d279d add hamming-code gen/check lib 2014-11-06 18:19:59 -08:00
Sebastien Bourdeauducq
ccc9a0d334 test/test_size: fix slice comparison 2014-11-03 12:08:43 +08:00
Sebastien Bourdeauducq
dcedc4e6a5 actorlib/structuring/Pipeline: make 'busy' a signal 2014-11-01 21:48:02 +08:00
Florent Kermarrec
33c3a927c2 actorlib/structuring: add Pipeline
Pipeline enables easy cascading of dataflow modules.
DataFlowGraph can eventually use it to implement the
add_pipeline method to avoid duplicating things.
2014-11-01 21:47:00 +08:00
Florent Kermarrec
8db549a23d actorlib/structuring: add Converter
Converter enables easy conversions of data width on dataflows.
It handles the 3 possibles cases:
- downconverter
- upconverter
- direct connection when data width are identical.
2014-11-01 21:43:52 +08:00
Sebastien Bourdeauducq
a7e4907724 Merge branch 'master' of github.com:m-labs/migen 2014-11-01 21:33:35 +08:00
Florent Kermarrec
bd1d456f5d flow/actor, actorlib/structuring: add packet support 2014-11-01 21:22:46 +08:00
Florent Kermarrec
4d1b6da42f bus/csr: add configurable address_width (needed more than 32 modules with CSR) 2014-11-01 21:22:11 +08:00
Florent Kermarrec
fcf2f7517c crc: generate error asynchronously to avoid stalling the flow and simplify 2014-11-01 21:21:46 +08:00
Sebastien Bourdeauducq
a4782899f6 fhdl/verilog: fix tristate to instance connection 2014-10-29 18:18:17 +08:00
Yann Sionneau
286092b62e Raise exception when not using correct boolean operators 2014-10-27 19:40:22 +08:00
Florent Kermarrec
86abb253c8 flow/actor/Endpoint: clean up __getattr__ 2014-10-22 09:35:30 +08:00
Florent Kermarrec
37031e3a2f DMAWriteController: fix Demultiplexer layout 2014-10-20 23:58:16 +08:00
Florent Kermarrec
07c33279c2 use new direct access on endpoints 2014-10-20 23:12:16 +08:00
Florent Kermarrec
ff688fb2f9 _Endpoint: allow direct access of payload elements 2014-10-20 23:09:56 +08:00
Florent Kermarrec
dbaeaf7833 remove trailing whitespaces 2014-10-17 17:08:46 +08:00
Florent Kermarrec
22507b117c bank: add re to CSRStorage
being able to know when a register is updated is useful in many cases and avoid having to handle another register for that.
re is asserted when the the last CSR of the Compound is written. Software must also write Compound in the right order.
2014-10-16 17:43:41 +08:00
Sebastien Bourdeauducq
15f67b30d0 genlib/fsm: make first fsm.act() the reset state, even when using after_*/before_* methods before fsm.act 2014-09-29 19:38:58 +08:00
Florent Kermarrec
e03091e7e2 add generic CRCEngine, CRC32, CRCInserter and CRCChecker
CRCEngine implements a generic and optimized CRC LFSR. It will enable generation of CRC generators and checkers.
CRC32 is an implementation of IEEE 802.3 CRC using the CRCEngine.
CRC32Inserter and CRC32Checker have been tested on an ethernet MAC.
2014-09-26 11:42:10 +08:00