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picorv32
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277 Commits 2 Branches 1 Tag 2.8 MiB
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96 Commits

Author SHA1 Message Date
Clifford Wolf b6c4c2eeb9 Added TWO_CYCLE_COMPARE 2015-07-07 22:51:52 +02:00
Clifford Wolf 54f89ba904 Updated RV32I tools instructions 2015-07-05 10:32:26 +02:00
Clifford Wolf 686f77facb Updated area and timing stats 2015-07-02 14:41:15 +02:00
Clifford Wolf c10125eb5c Added TWO_STAGE_SHIFT parameter 2015-07-02 12:29:06 +02:00
Clifford Wolf c48a3b2434 Removed trailing whitespaces 2015-07-02 10:49:35 +02:00
Clifford Wolf 9d3b0a9692 Updated evaluation 2015-07-02 00:54:11 +02:00
Clifford Wolf 198c995c8f Back to Vivado 2015.1 
my synthesis license has a 2015.05 version limit..
 2015-07-01 22:42:25 +02:00
Clifford Wolf 84e2202fef Vivado 2015.2 area evaluation 2015-07-01 22:18:20 +02:00
Clifford Wolf 553b1ef143 Updated Xilinx 7-Series area stats 2015-07-01 21:48:51 +02:00
Clifford Wolf 34193bf9df Added CATCH_MISALIGN and CATCH_ILLINSN 2015-07-01 21:20:51 +02:00
Clifford Wolf c22ea8fe0a Spelling fixes by Larry Doolittle 2015-07-01 08:18:10 +02:00
Clifford Wolf 9d809eb0d9 Added TOC to README 2015-06-30 12:25:05 +02:00
Clifford Wolf 56b2b4971d Added Note about Icarus Verilog to README 2015-06-29 09:58:39 +02:00
Clifford Wolf 7417a3e249 Added LATCHED_IRQ parameter 2015-06-29 07:54:47 +02:00
Clifford Wolf 1321840665 Minor README change 2015-06-29 07:37:48 +02:00
Clifford Wolf 46026ba985 Added ENABLE_IRQ_QREGS and ENABLE_IRQ_TIMER 2015-06-28 22:09:51 +02:00
Clifford Wolf 21157b8f1d Cleanups in PCPI interface 2015-06-28 15:41:55 +02:00
Clifford Wolf b076d72806 Fixed PCPI instr prefetching 2015-06-28 14:51:53 +02:00
Clifford Wolf 094dc690bb Added resource utilization to xilinx eval 2015-06-28 13:51:37 +02:00
Clifford Wolf 1f99de5117 Improvements in picorv32_pcpi_mul 2015-06-28 13:07:50 +02:00
Clifford Wolf 923ac360ff More README stuff 2015-06-28 12:20:23 +02:00
Clifford Wolf 4c15e05298 Moved ENABLE_MUL from picorv32_axi to picorv32 2015-06-28 12:19:49 +02:00
Clifford Wolf 818faffe25 Improved IRQ documentation, added assembler macros 2015-06-28 02:10:45 +02:00
Clifford Wolf 792baeabcf Minor README changes 2015-06-28 01:18:19 +02:00
Clifford Wolf df6b95fb87 Various README updates 2015-06-27 23:54:52 +02:00
Clifford Wolf dee66e136e Added "make table.txt" vivado scripts 2015-06-27 13:55:33 +02:00
Clifford Wolf 2bd43fff68 Updated TODOs 2015-06-26 23:56:43 +02:00
Clifford Wolf 617fa9d80a Added PCPI to README 2015-06-26 23:49:16 +02:00
Clifford Wolf f0b824ad9a Minor README changes 2015-06-26 16:15:39 +02:00
Clifford Wolf c06286423b Added build instructions for RV32I toolchain 2015-06-26 13:53:43 +02:00
Clifford Wolf f87d81287c More README changes 2015-06-26 11:01:34 +02:00
Clifford Wolf 266ff03539 Minor README changes 2015-06-26 10:51:15 +02:00
Clifford Wolf 5d4ce82050 Implemented waitirq instruction 2015-06-26 10:39:08 +02:00
Clifford Wolf 9a4a06d981 Refactoring of IRQ handling 2015-06-26 10:03:37 +02:00
Clifford Wolf 9d26ebcf58 Improvements in README.md 2015-06-25 14:14:07 +02:00
Clifford Wolf 23b700cf73 Added basic IRQ support 2015-06-25 14:08:39 +02:00
Clifford Wolf b4b1d03b1c More Todos 2015-06-09 10:01:00 +02:00
Clifford Wolf a9532f81ed Refactored instruction decoder 2015-06-08 09:08:19 +02:00
Clifford Wolf 06ba3a1a57 README Updates 2015-06-07 20:59:20 +02:00
Clifford Wolf 34d9dea8c7 Added support for dual-port register file 2015-06-07 20:53:19 +02:00
Clifford Wolf e84f044bc5 Major redesign of main FSM 2015-06-07 11:49:47 +02:00
Clifford Wolf 491cd5e15d Using libc assembler code in dhrystone stdlib.c 2015-06-07 07:29:13 +02:00
Clifford Wolf 44ea992fed Updated CPI table in README 2015-06-06 21:43:33 +02:00
Clifford Wolf 90ff3380a4 Updated README 2015-06-06 21:27:58 +02:00
Clifford Wolf f9ae73066b Added license info to README 2015-06-06 17:24:11 +02:00
Clifford Wolf 77ba5a1897 Initial import 2015-06-06 14:14:32 +02:00