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1353 commits 9 branches 14 tags 12 MiB
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783 commits

Author SHA1 Message Date
Franck Jullien
f18c1a033c Efinix: ti60: add HyperRAM support 2021-12-17 10:23:10 +01:00
Derek Mulcahy
1c87c391c4 Initial release for Snickerdoodle 2021-12-14 16:00:42 -05:00
hubmartin
84f267e00c Change bios-flash-offset for tinyFPGA 2021-12-14 19:10:03 +01:00
enjoy-digital
c2a840f777
Merge pull request from fjullien/titanium_spi 
Titanium spi
 2021-12-14 08:21:15 +01:00
Franck Jullien
9608cae2ee efinix: Ti60f225 change spi_flash module 2021-12-13 23:01:48 +01:00
Franck Jullien
be7dbf3b1b exfinix: efinix_titanium_ti60_f225_dev_kit: fix typo 2021-12-13 22:53:50 +01:00
Florent Kermarrec
179e9090d1 Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets. 2021-12-13 15:54:56 +01:00
Franck Jullien
e84f32b918 efinix: add titanium Ti60 dev kit 2021-12-13 09:37:14 +01:00
enjoy-digital
35e0026875
Merge pull request from sergachev/master 
sipeed_tang_nano_4k: add option to build with Gowin EMCU
 2021-12-09 14:30:54 +01:00
Ilia Sergachev
14a8c50e97 sipeed_tang_nano_4k: connect Gowin EMCU UART, undo unnecessary changes 2021-12-09 00:17:48 +01:00
Ilia Sergachev
6274c4c425 sipeed_tang_nano_4k: connect Gowin EMCU UART 2021-12-09 00:12:31 +01:00
Ilia Sergachev
13c83ba532 sipeed_tang_nano_4k: add initial Gowin EMCU support 2021-12-08 23:50:14 +01:00
Ilia Sergachev
4287ab561e sipeed_tang_nano_4k: allow non-vexriscv CPUs 2021-12-08 23:33:49 +01:00
enjoy-digital
9119250276
Merge pull request from tilk/de1_soc 
Better support for DE1-SoC
 2021-12-08 06:18:25 +01:00
enjoy-digital
2b7587632f
Merge pull request from gregdavill/butterstick-updates 
Butterstick updates
 2021-12-08 06:16:29 +01:00
Florent Kermarrec
8ad89881c2 fairwaves_xtrx: Add pcie_x2 definitions and switch to it. 2021-12-07 15:27:55 +01:00
Marek Materzok
cbeb2a3792 Add LedChaser to DE1-SoC 2021-12-05 20:16:10 +01:00
Greg Davill
fd2ec534a7 butterstick: Add extra pins 2021-12-05 20:33:28 +10:30
Greg Davill
c8a8e943b5 butterstick: add --sdram-device option 
Set 64M16 as default sdram-device.

Related to
2021-12-04 17:07:06 +10:30
Florent Kermarrec
bf8b23c19f trenz_tec0117: Update target. 2021-12-02 18:23:11 +01:00
enjoy-digital
efa1f46356
Merge pull request from sergachev/master 
Fix Sipeed Tang Nano 4k example compilation; adapt Gowin PLL class changes
 2021-12-02 09:14:32 +01:00
Ilia Sergachev
666ef9dad3 sipeed_tang_nano_4k: use minimal vexriscv variant to fit into number of BSRAMs 2021-11-29 11:46:32 +01:00
Ilia Sergachev
2fb734a0f2 sipeed_tang_nano*: adapt Gowin PLL changes in litex 2021-11-29 11:45:13 +01:00
Florent Kermarrec
1829693877 fairwaves_xtrx: Integrate ICAP/SPIFlash (for update over PCIe). 2021-11-26 16:18:52 +01:00
enjoy-digital
fe14e16c1b
Merge branch 'master' into tang_primer 2021-11-23 19:04:09 +01:00
Miodrag Milanovic
6954dd25eb Set minimal core, since full does not work for some reason 2021-11-23 15:26:54 +01:00
Miodrag Milanovic
0b7fabb864 FireAnt board support 2021-11-23 14:43:52 +01:00
Miodrag Milanovic
2cc322e65d Add initial support for Tang Primer board 2021-11-22 19:10:11 +01:00
Florent Kermarrec
70c0dbb185 targets/radiona_ulx3s: Remove SDRAM underflows debug pin. 2021-11-22 11:54:18 +01:00
Florent Kermarrec
60b769b624 efinix_trion_t120_bga576_dev_kit/ethernet: Disable software debug (RX now seems to be working fine). 2021-11-16 18:53:15 +01:00
Florent Kermarrec
996f5b2edd efinix_trion_t120_bga576_dev_kit: Enable target1 port and also connect it to SoC. 2021-11-16 18:12:42 +01:00
Florent Kermarrec
7ce6c4cf79 efinix_trion_t120_bga576_dev_kit: Switch to ctrl_type = "none" (Also seems to work fine, avoid ddr_reset_sequencer dependency). 2021-11-16 17:50:47 +01:00
Florent Kermarrec
99f4f97f00 efinix_trion_t120_bga576_dev_kit: Use new InterfaceWriterBlock/InterfaceWriterXMLBlock and move PLL/DRAM blocks definition to target. 2021-11-16 17:41:26 +01:00
Hans Baier
e16fa193fc qmtech 10cl006: remove all options which won't fit into the device. use uartbone as default 2021-11-15 10:23:01 +07:00
Florent Kermarrec
138dc1467e quicklogic_quickfeather: Fix build with GPIOIn when cpu-type=None (IRQ not supported). 2021-11-14 09:30:52 +01:00
Florent Kermarrec
ed67b91fcc quicklogic_quickfeather: Simplify cpu_type switch between None/EOS-S3. 2021-11-14 09:26:29 +01:00
Florent Kermarrec
2d3422869c quicklogic_quickfeather: Update clocking. 2021-11-14 09:19:19 +01:00
Florent Kermarrec
df468fcf85 quicklogic_quickfeather: Avoid add_csr calls (not required). 2021-11-14 08:54:49 +01:00
Florent Kermarrec
06bae58f48 efinix_trion_t120_bga576: Do a bit a of cleanup on LPDDR3 now that working. 2021-11-12 19:43:28 +01:00
Florent Kermarrec
86f6d7e66b efinix_trion_t120_bga576_dev_kit: Remove test command. 2021-11-12 18:06:11 +01:00
Florent Kermarrec
4e03f66fad efinix_trion_t120_bga576_dev_kit: Remove debug, integrate LPDDR3 as done on other targets. 
Also lower sys_clk_freq since seems to cause issue with DRAM at 100MHz: Needs to be investigated.
 2021-11-12 18:04:30 +01:00
Florent Kermarrec
77fffda9cd efinix_trion_t120_bga576_dev_kit: Switch to UARTBone, Add LiteScope on Pseudo-AXI, fix addressing and do first successful LPDDR3 accesses :) 2021-11-12 16:41:42 +01:00
Gwenhael Goavec-Merou
648d38da7e quicklogic_quickfeather: add button and GPIOIn 
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
 2021-11-12 13:21:00 +01:00
Florent Kermarrec
b6c5a85b98 Add initial Efinix Trion T20 MIPI Dev Kit support: CPU, ROM, RAM, UART and SPI Flash. 
Tested with:
./efinix_trion_t20_mipi_dev_kit.py --with-spi-flash --build --load
        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Nov 12 2021 08:37:48
 BIOS CRC passed (2bec12a3)

 Migen git sha1: 7507a2b
 LiteX git sha1: f679992f

--=============== SoC ==================--
CPU:		VexRiscv @ 100MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
FLASH:		4096KiB

--========== Initialization ============--

Initializing W25Q32JV SPI Flash @0x00400000...
Enabling Quad mode...
First SPI Flash block erased, unable to perform freq test.
Memspeed at 0x400000 (Sequential, 4.0KiB)...
   Read speed: 2.6MiB/s
Memspeed at 0x400000 (Random, 4.0KiB)...
   Read speed: 1.5MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
 2021-11-12 08:42:10 +01:00
Florent Kermarrec
d6fc4b412e efinix_trion_t120/t20_dev_kit: Switch back to 100MHz (now that timings constraints are correctly applied). 2021-11-12 07:58:51 +01:00
Florent Kermarrec
7ce8567d9b targets/efinix: Bitstreams now directly generated to gateware directory. 2021-11-11 11:19:39 +01:00
Florent Kermarrec
855fd7e3d7 efinix_trion_t120_bga576_dev_kit: Continue LPDDR3 integration... 2021-11-10 19:40:35 +01:00
Florent Kermarrec
224f527baa efinix_trion_t120_bga576_dev_kit: Go a bit further in DRAM integration. 2021-11-10 12:07:30 +01:00
Gwenhael Goavec-Merou
040e7b3104 quicklogic_quickfeather: Use initial EOS-S3 support/integration. 2021-11-09 18:59:37 +01:00
Florent Kermarrec
8ce83ce92f efinix_trion_t120_bga576_dev_kit: Add inital LPDDR3 integration (not yet working). 2021-11-09 16:13:40 +01:00
Florent Kermarrec
9a7e5f40b4 efinix_trion_t120_bga576_dev_kit: Add Ethernet/Etherbone support. 
Still not fully validated: TX seems OK but RX seems shifted/corrupted.
 2021-11-09 11:32:32 +01:00
Florent Kermarrec
ccebae6f55 targets/hyperram: Update integration. 2021-11-08 16:39:49 +01:00
Florent Kermarrec
184f41e61a sipeed_tang_nano: Use PLL and 48MHz sys_clk, switch to SoCMini, add UARTBone (at 1MBauds). 
Working correctly on hardware with updated CH552 firmware & patched litex_server...
 2021-11-08 09:23:44 +01:00
Hans Baier
d6bf2fd00e terasic_sockit: Use standard SDRAM module from litedram 2021-11-08 12:48:03 +07:00
Hans Baier
a9847f15a7 qmtech_5cefa2: tuned the clock phase shift to be able to run the system at 105MHz 2021-11-06 09:58:10 +07:00
Hans Baier
b2813cfb70 use the right DRAM chip for the QMTech Altera boards 2021-11-06 08:45:03 +07:00
Florent Kermarrec
6e7c76b71e fairwaves_xtrx: Add clk60 (from USB PHY) as default Clk when no PCIe. 
Fixes CI.
 2021-11-05 15:22:55 +01:00
Florent Kermarrec
ceaaf67dfd Add initial Fairwaves XTRX support (SoC with JTAG-UART and PCIe Gen2 X1). 2021-11-05 14:52:45 +01:00
enjoy-digital
01463a81a4
Merge pull request from hansfbaier/qmtech-fixes 
10cl006: add missing spiflash option
 2021-11-05 07:11:27 +01:00
Hans Baier
3a25af1c28 10cl006: add missing spiflash option 2021-11-05 09:57:04 +07:00
Hans Baier
0edce3a176 Add support for QMTech 5CEFA2 board (Cyclone V) 2021-11-05 09:53:25 +07:00
Florent Kermarrec
a482d7f6de targets/qmtech_xc7a35t: Use gpio_serial as serial when not mounted on daughterboard. 2021-11-04 18:52:36 +01:00
Florent Kermarrec
9543b5efae marble/marble_mini: Add berkeleylab prefix. 2021-11-04 18:42:16 +01:00
Florent Kermarrec
5e5ae880a4 targets/litex_acorn_baseboard: Integrate WS2812/NeoPixel. 
Tested with:
./litex_acorn_baseboard.py --cpu-type=None --uart-name=uartbone --with-ws2812 --build --csr-csv=csr.csv --load
litex_server --uart --uart-port=/dev/ttyUSBX
And test script: https://gist.github.com/enjoy-digital/c32c679a9ee4429d7f38a5ca5016a45a
 2021-11-04 16:36:25 +01:00
enjoy-digital
808befec3b
Merge pull request from yetifrisstlama/master 
add Marble-board platform and target file
 2021-11-04 15:20:11 +01:00
Hans Baier
7aa639ac0f QMTech boards: fix swapped RX/TX lines, remove double uart replacer 2021-11-02 09:34:25 +07:00
Michael Betz
e645eb243b add marble board platform and target file 2021-10-28 18:41:22 +02:00
Florent Kermarrec
207afb98fc ego1: Switch to VideoTerminal (LiteVideo is no longer provided by default with LiteX). 2021-10-27 16:29:46 +02:00
Florent Kermarrec
91818bc5f0 targets/gsd_butterstick/BaseSoC: Set default device to 85F (consistency with default arguments). 2021-10-26 17:01:55 +02:00
Florent Kermarrec
c7a91f9eab efinix: Enable identifier on SoC (issue fixed in LiteX). 2021-10-25 19:33:49 +02:00
Florent Kermarrec
4bcfde8882 efinix: Avoid no_we on ROM/RAMs (no longer required). 2021-10-25 19:10:03 +02:00
Florent Kermarrec
d13a8d54b8 efinix_trion_txy_dev_kit: Lower sys_clk_freq for now to 50MHz, enable QSPI on T120 BGA576 dev kit. 
Now possible with recent LiteX changes to support Tristate IOs.
 2021-10-25 18:35:35 +02:00
Florent Kermarrec
f230eaf9bc efinix_trion_t120_bga576: Add Tristate test code. 2021-10-25 15:01:34 +02:00
Florent Kermarrec
0ac0f9e75d efinix_xyloni_dev_kit: Switch to openFPGALoader to load bitstream. 2021-10-25 12:49:48 +02:00
Florent Kermarrec
fc05379929 efinix_xyloni_dev_kit: Use PLL. 2021-10-25 12:16:47 +02:00
Florent Kermarrec
394ea23b99 efinix_xyloni_dev_kit: Only force variant to minimal for Vexriscv. 2021-10-22 14:47:12 +02:00
Florent Kermarrec
75fd276dbe efinix_xyloni_dev_kit: Increase similarities with others boards and make target very similar to iceBreaker/Fomu/TangNano4k. 2021-10-21 11:34:55 +02:00
Florent Kermarrec
dc1328f1a5 efinix_xyloni_dev_kit: Fix copyrights. 2021-10-21 10:12:46 +02:00
Florent Kermarrec
012c1d9705 efinix_trion_t20: Minor changes (move serial to platform, fix platform copyright). 2021-10-21 10:10:35 +02:00
enjoy-digital
0cf9793be5
Merge pull request from AndrewD/master 
efinix: xyloni dev board basic support
 2021-10-21 10:06:25 +02:00
Florent Kermarrec
7525132907 litex_acorn_baseboard/video: Switch to 800x600@60Hz. 2021-10-19 16:34:28 +02:00
Andrew Dennison
c548b1c1e2 efinix: xyloni dev board basic support 
* This works: efinix_xyloni_dev_kit.py --cpu-type None --build --load --flash
* issues with SPIflash - wrong generation for tristates miso mosi for
  some reason
 2021-10-19 11:23:29 +11:00
enjoy-digital
a53f17380f
Merge pull request from antmicro/add-data-center-board 
WIP: boards: added datacenter DDR4 RDIMM tester board
 2021-10-18 13:36:37 +02:00
enjoy-digital
a4d330dd2c
Merge pull request from mmicko/efinix_t20_flash 
Enable writing to flash for T20
 2021-10-15 18:38:08 +02:00
Florent Kermarrec
3730d96709 litex_acorn_baseboard: Add SPIFlash support. 2021-10-15 18:22:08 +02:00
Miodrag Milanovic
1f65d37121 Enable writing to flash for T20 2021-10-15 16:44:35 +02:00
Miodrag Milanovic
d9638c40b8 Initial support for Efinix Trion T20 BGA256 Dev Kit 2021-10-15 12:26:15 +02:00
Florent Kermarrec
914e330a86 efinix_trion_t120_bga576_dev_kit: Add Flash support (Through openFPGALoader). 2021-10-15 09:38:43 +02:00
Florent Kermarrec
195bf176cf efinix_trion_t120_bga576: Add SPIFlash support (X1 for now). 2021-10-14 19:16:01 +02:00
Florent Kermarrec
03c34e31cd efinix_trion_t120_bga576: Add PLL to CRG and increase default sys_clk to 100MHz. 2021-10-14 15:45:26 +02:00
Florent Kermarrec
2ea803b7d1 efinix_trion_t120_bga576: Set no_we on integrated_main_ram. 
To allow --integrated-main-ram-size use.
 2021-10-14 10:19:18 +02:00
Florent Kermarrec
430918756d efinix_trion_t120_bga576: Add PMODs connectors and use USB-UART/PMOD_E as Serial. 2021-10-14 10:10:42 +02:00
Florent Kermarrec
36897f4646 efinix_trion_t120_bga576: Disable Identifier (crashes design) and move no_we, working. 
./efinix_trion_t120_bga576_dev_kit.py --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS CRC passed (b23a7321)

 Migen git sha1: 7507a2b
 LiteX git sha1: 8316fbf1

--=============== SoC ==================--
CPU:		VexRiscv @ 40MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
 2021-10-14 09:39:54 +02:00
Florent Kermarrec
ad773b6f2f efinix_trion_t120_bga576: Fix argparse description. 2021-10-13 17:28:43 +02:00
Florent Kermarrec
6c17d76a92 targets/efinix_trion_t120_bga576: Switch to SoCCore (with CPU) and use button as reset (and AsyncResetSynchronizer). 2021-10-13 16:35:14 +02:00
Florent Kermarrec
a4d178a740 Add Efinix Trio T120 BGA576 Dev-Kit initial support (LedChaser). 2021-10-13 12:29:53 +02:00
Florent Kermarrec
83e64fbd64 targets/qmtech_10cl006: +x. 2021-10-13 12:16:41 +02:00
Florent Kermarrec
e29bcd30a6 litex_acorn_baseboard: Add some M2 signals and set devslp to 0. 2021-10-12 11:54:17 +02:00
Florent Kermarrec
a365362f5d Rename litex_m2_baseboard to litex_acorn_baseboard and add link to repository. 2021-10-11 18:36:12 +02:00
Florent Kermarrec
fe08491e8d litex_m2_baseboard: Add LCD. 2021-10-11 18:30:23 +02:00
enjoy-digital
393252ddc9
Merge pull request from hansfbaier/master 
Add support for QMTech 10CL006 board
 2021-10-11 14:01:06 +02:00
enjoy-digital
79fe4a9199
Merge pull request from alainlou/master 
rz_easyfpga: cleanup and ease of use
 2021-10-11 13:57:06 +02:00
Florent Kermarrec
2b2c7d3d68 trellisboard: Add PMOD GPIO support (for tests with MicroPython). 2021-10-11 11:33:13 +02:00
Florent Kermarrec
9e18d9bc34 gsd_butterstick: Remove ECLKBRIDGECS (not required). 2021-10-07 14:09:22 +02:00
Hans Baier
d119b598c5 Add support for QMTech 10CL006 board 2021-10-05 12:06:41 +07:00
alainlou
1b676f929a cleanup and ease of use 
- update README
- delete some unnecessary toolchain commands (copied from trenz boards)
- use minimal cpu_variant by default when vexriscv is selected
 2021-10-03 13:21:45 -04:00
Florent Kermarrec
e8611794b4 Add initial QuickLogic QuickFeather support (Led Chaser). 
Untested.
 2021-10-01 10:58:26 +02:00
Florent Kermarrec
de4ad324cb mnt_rkx7: Revert default sys_clk_freq to 100MHz. 2021-09-30 18:03:22 +02:00
Florent Kermarrec
1858273945 mnt_rkx7: Add SPI SDCard support. 2021-09-30 18:01:54 +02:00
Florent Kermarrec
05f3158311 mnt_rkx7: Increase default sys_clk_freq to 125MHz. 2021-09-30 16:22:18 +02:00
Florent Kermarrec
1217e94218 mnt_rkx7: Switch DDR3 to IS43TR16512B now added to LiteDRAM. 2021-09-30 15:45:40 +02:00
Florent Kermarrec
9bcae49629 mnt_rkx7: Add I2C (For the SiI9022A). 2021-09-30 15:33:53 +02:00
Florent Kermarrec
4f7c18a503 mnt_rkx7: Add Ethernet/Etherbone support. 2021-09-30 15:14:03 +02:00
Florent Kermarrec
84f0d715ff mnt_rkx7: Add SDCard support. 2021-09-30 11:34:23 +02:00
Florent Kermarrec
31b404c42f mng_rkx7: Add SPI Flash support. 2021-09-30 11:29:56 +02:00
Florent Kermarrec
df7fe5687e Add initial MNT Reform Kintex-7 module (RKX7) support with Clk, UART and DDR3. 
Compiles but untested on hardware.
 2021-09-30 11:06:39 +02:00
Florent Kermarrec
82653cf66f icebreaker/fomu: Fix SPRAM split. 2021-09-30 09:32:26 +02:00
Florent Kermarrec
5addd7f7d8 icebreaker/fomu: Split PSRAM in half: 64kB SRAM/64kB RAM). 
Allows building bare metal demo and running it directly on these boards.
 2021-09-29 19:33:22 +02:00
enjoy-digital
dfa572083a
Merge pull request from ozbenh/wukong-v2 
Wukong board improvements
 2021-09-28 13:22:42 +02:00
Alessandro Comodi
228245075a boards: added datacenter DDR4 RDIMM tester board 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-09-27 10:15:55 +02:00
Benjamin Herrenschmidt
4a52996106 Wukong board improvements 
This adds support for v2 of the board via a --board-version argument
and a way to select the FPGA speed grade via a --speed-grade argument.

Note that the speed grade now defaults to -1. QMTech confirmed that
V1 of the board were made in two batches, one with -1 and one with -2,
while V2 of the board is all -1. So -1 is the safer default.

This also fixes the inversion of j10 and j11 and a typo in the pin
definition of jp3

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 2021-09-24 12:13:56 +10:00
enjoy-digital
f18b10d1ed
Merge pull request from Quiddle11/atlys 
Initial Digilent Atlys support
 2021-09-23 10:21:49 +02:00
Florent Kermarrec
921c300b50 digilent_atlys: Simplify/Remove entropy... 
Build tested with ./digilent_atlys.py --with-ethernet --build.
 2021-09-23 10:17:54 +02:00
alainlou
1333f89ed6 rz_easyfpga: adjust SDRAM clk phase 
- also add 1:2 rate
 2021-09-22 00:26:28 -04:00
Alain Lou
610e82d774
Add initial RZ-EasyFPGA support! () 2021-09-21 09:55:22 +02:00
Florent Kermarrec
5190c9c869 sipeed_tang_nano_4k: Initial Video Out support. 
With colorbars for now, need to free up BRAMS for Video Terminal (or finish HyperRAM support).
 2021-09-20 09:32:20 +02:00
Florent Kermarrec
30756ce05e targets: Update to VideoHDMIPHY. 2021-09-20 09:30:32 +02:00
Florent Kermarrec
7161ad18ec sipeed_tang_nano_4k: Integrate new LiteX's GW1NSRPLL. 2021-09-20 08:40:19 +02:00
Florent Kermarrec
a5c5ba7652 sipeed_tang_nano_4k: Integrate HyperRam (not yet working). 2021-09-17 16:30:39 +02:00
Florent Kermarrec
376a836583 sipeed_tang_nano: Add SPI Flash, Enable CPU and use new external SPI Flash support from OpenFPGALoader. 
./sipeed_tang_nano_4k.py --cpu-type=vexriscv --cpu-variant=lite --build --flash

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Sep 17 2021 15:54:08
 BIOS CRC passed (6cc6de6d)

 Migen git sha1: a5bc262
 LiteX git sha1: 46cd9c5a

--=============== SoC ==================--
CPU:		VexRiscv_Lite @ 27MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		64KiB
SRAM:		8KiB
FLASH:		4096KiB

--========== Initialization ============--

Initializing W25Q32 SPI Flash @0x80000000...
SPI Flash clk configured to 13 MHz
Memspeed at 0x80000000 (Sequential, 4.0KiB)...
   Read speed: 1.3MiB/s
Memspeed at 0x80000000 (Random, 4.0KiB)...
   Read speed: 521.9KiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
 2021-09-17 15:57:55 +02:00
Florent Kermarrec
28571308bc sispeed_tang_nano: Add simple UART loopback test... (Not working...) 2021-09-16 19:34:48 +02:00
Florent Kermarrec
5955a35372 Add initial Sipeed Tang Nano support (Clk/Leds/Buttons). 2021-09-16 19:22:30 +02:00
Florent Kermarrec
c0aed8a727 litex_m2_baseboard: Add Video Terminal support. 2021-09-16 18:54:50 +02:00
Florent Kermarrec
32a9256f3b litex_m2_baseboard: Add SDCard support. 2021-09-16 18:17:34 +02:00
Florent Kermarrec
0854a5d234 litex_m2_baseboard: Add Ethernet/Etherbone support. 2021-09-16 18:02:55 +02:00
Florent Kermarrec
3ad0eb6992 Add initial LiteX M2 Baseboard support with Clk/Serial/Buttons. 2021-09-16 17:44:50 +02:00
enjoy-digital
26943959b5
Merge pull request from trabucayre/runber_support 
Add runber support
 2021-09-15 08:32:05 +02:00
Gwenhael Goavec-Merou
7ccae3332d Add runber support 2021-09-15 06:50:57 +02:00
Florent Kermarrec
68fb163a27 targets: Remove spiflash mapping on targets where it's no longer useful. 2021-09-14 18:35:13 +02:00
Florent Kermarrec
db91eda899 linsn_rv901t.py: Update Ethernet and add Etherbone support. 2021-09-13 19:35:05 +02:00
Nathaniel R. Lewis
b8373a361d alchitry_mojo: new board 2021-09-10 02:40:31 -07:00
enjoy-digital
cacb76450f
Merge pull request from teknoman117/alchitry-au 
Add Alchitry Au as new board
 2021-09-09 11:42:37 +02:00
Florent Kermarrec
8d91489756 tang_nano_4k: Add more IOs. 2021-09-09 11:23:20 +02:00
Nathaniel R. Lewis
9bbdb87130 alchitry_au: new board 2021-09-09 00:03:19 -07:00
Florent Kermarrec
88534c6689 tang_nano_4k: Fix typo in sipeed. 2021-09-08 23:02:39 +02:00
Florent Kermarrec
ce52c8c5ed beaglewire: Fix typo in qwertyembedded. 2021-09-08 21:29:29 +02:00
Florent Kermarrec
ecebe7e267 Add initial SiSpeed Tang Nano 4K support (Led blink only for now...). 
./sispeed_tang_nano_4k.py --build --load

Build with Gowin EDA.
Load with OpenFPGALoader.
 2021-09-08 19:36:46 +02:00
Florent Kermarrec
129b95f9b5 sqrl_acorn: Update pre_placement_commands with new XilinxVivadCommands. 2021-09-08 16:27:30 +02:00
Florent Kermarrec
7fa22a494b arty: Switch SPI Flash rate to 1:2 (DDR) (Possible on Arty since SPI Flash's clk does not require use of STARTUPE2). 
On the Digilent Arty, the SPI Flash's clk is connected to CCLK (that can be driven
through the STARTUPE2) but also to another generic IO that can be use to drive the
clock through DDR primitives.
 2021-09-07 15:07:59 +02:00
Florent Kermarrec
aa2209729f gsd_butterstick: Force uart_name to crossover when set to serial. 2021-09-02 15:23:05 +02:00