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2,207 Commits 9 Branches 14 Tags 12 MiB
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1291 Commits

Author SHA1 Message Date
Florent Kermarrec c8603bebe4 targets/hyperram: Switch Hyperram memory mode to rwx (required with VexiiRiscv). 2024-09-04 22:06:40 +02:00
Gwenhael Goavec-Merou 185f8d5da4
Merge pull request #603 from pepijndevos/apicula 
make Gowin boards work with Apicula
 2024-09-04 10:40:10 +02:00
Pepijn de Vos 8f59ebeffb WIP: make boards Gowin boards work with Apicula 2024-09-04 08:33:06 +02:00
Gwenhael Goavec-Merou 738a5a8931 targets/efinix_trion_t120_bga576_dev_kit.py: added argument to select between RMII PMOD (default) or onboard RGMII Phy 2024-09-03 19:16:39 +02:00
Gwenhael Goavec-Merou 7f26f3940f efinix_trion_t120_bga576_dev_kit.py: fixed/rewire rx_ctl/tx_ctl (not compatible with DDIO mode), added message at build time 2024-09-03 16:01:51 +02:00
Gwenhael Goavec-Merou 0313424fa0 targets/efinix_trion_t120_bga576_dev_kit.py: added argument to configure remote-ip. Pass local_ip and remote_ip to add_etherxxx 2024-09-03 12:42:49 +02:00
Gwenhael Goavec-Merou 5a1e4bedfd targets/efinix_titanium_ti60_f225_dev_kit.py: disable software_debug by default 2024-09-03 12:41:05 +02:00
Gwenhael Goavec-Merou 0787517338 targets/efinix_titanium_ti60_f225_dev_kit.py: added argument to configure remote-ip. Pass local_ip and remote_ip to add_etherxxx 2024-09-03 12:40:35 +02:00
Florent Kermarrec e7d00a8c43 ti60_f225_dev_kit: Update to new HyperRAM core with 2:1 ratio. 
Tested at up to 250MHz sys_clk -> 125MHz HyperRAM Clk.
 2024-08-29 12:35:39 +02:00
Florent Kermarrec fd4f9ac186 targets: Use KILOBYTE/MEGABYTE constants when possible. 2024-08-29 12:18:19 +02:00
Florent Kermarrec c5d1a252c5 targets: Fix build with --cpu-type=None on iCE40/Up5kSPRAM. 2024-08-28 15:53:53 +02:00
Gwenhael Goavec-Merou b1a6da84b3 sipeed_tang_primer_25k: add SDRAM support (j3 connector), allows user to select between mister and sipeed SDRAM module 2024-08-04 12:14:56 +02:00
Gwenhael Goavec-Merou 2fa838b79d sipeed_tang_mega_138k_pro: added SDRAM sipeed variant, allows user to select between mister and sipeed SDRAM module, fix sipeed SDRAM memory module 2024-08-04 12:13:47 +02:00
Gwenhael Goavec-Merou 938bf8b3a6 targets/lattice_certuspro_nx_xx,targets/lattice_crosslink_nx_xxx: pass platform to NXOSCA CTOR 2024-07-22 15:18:27 +02:00
Florent Kermarrec 5d4ebeb09c targets: Add initial Enclustra Mercury+ XU8/PE3 target with DRAM and PCIe. 2024-07-22 11:40:19 +02:00
Florent Kermarrec 8f8e0bd228 targets/enclustra: Add Enclustra to identifier. 2024-07-22 11:38:22 +02:00
Florent Kermarrec f844d06da2 targets/litex_acorn_baseboard_mini: Add detect_ftdi_chip method since newer batch of baseboard is mounted with FTDI ft4232 chips. 
FT2232 and FT4232 chips are footprint compatible but still need to be handled differently from software.
 2024-07-19 15:43:25 +02:00
Florent Kermarrec 88ab3eca6f targets: Map SPRAM to SRAM when use as SRAM. 2024-07-17 11:01:34 +02:00
Florent Kermarrec 15c6f89b1a #570: Update CAN support with LiteX https://github.com/enjoy-digital/litex/pull/2007. 2024-07-05 10:26:28 +02:00
enjoy-digital 2e120bf8a4
Merge pull request #570 from disdi/master 
Add support for CTUCAN for Arty & Genesys2 board
 2024-07-05 09:21:09 +02:00
Gwenhael Goavec-Merou ac427feb0a targets/lattice_certuspro_nx_vvml,lattice_certuspro_nx_evn: switch sys_clk to NXPLL 2024-07-03 12:36:28 +02:00
Florent Kermarrec 9898672744 siglent_sdr1104xe: Update IP/MAC addresses. 2024-07-02 17:09:23 +02:00
Gwenhael Goavec-Merou 1c06988d80 platforms,targets/lattice_certuspro_nx_evn,lattice_certuspro_nx_vvml: set sysconfig SPI_MASTER mode by default at platform level 2024-07-01 11:07:25 +02:00
enjoy-digital 40204ac815
Merge pull request #595 from trabucayre/lattice_certusnxpro 
Lattice certusnxpro
 2024-06-28 13:26:47 +02:00
enjoy-digital 5813df9b44
Merge pull request #591 from VOGL-electronic/efinix_trion_t20_pulse_reset 
targets: efinix_trion_t20_bga256_dev_kit: add pulse for reset
 2024-06-28 13:24:29 +02:00
Gwenhael Goavec-Merou 8579af5710 lattice_certuspro_nx_vvml: new board support 2024-06-28 12:47:57 +02:00
Gwenhael Goavec-Merou f27bbc9645 lattice_certuspro_nx_evn: new board support 2024-06-28 12:47:16 +02:00
Florent Kermarrec 4f8540d53e targets/litex_acorn_baseboard_mini: Switch to _litex_acorn_baseboard_mini_io. 2024-06-27 14:23:43 +02:00
Fin Maaß c205bb756b targets: efinix_trion_t20_bga256_dev_kit: add pulse for reset 
to do a reset on the trion t20 a pulse is needed.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-06-24 09:14:55 +02:00
inc cb43cdf6f9 targets/machdyne_vanille: set uart_name to stub 2024-06-22 12:13:30 +02:00
inc a1df389c7e machdyne: switch to LiteXArgumentParser; add mozart ml2+mx1 and vivaldi ml1 2024-06-22 11:26:43 +02:00
inc 34e85c5cf6 machdyne: fix typos; add vanille and lakritz 2024-06-22 09:26:42 +02:00
enjoy-digital 95f5e030e5
Merge pull request #590 from trabucayre/zynq_csr_master_bus 
ZynqXXX boards: remove CSR definition and GP0 connection to CPU
 2024-06-19 08:48:33 +02:00
Florent Kermarrec dad6b2b9b6 efinix_trion_t20_bga256_dev_kit: Cleanup/Review platform/target. 2024-06-19 08:23:54 +02:00
enjoy-digital 8eaa4d637e
Merge pull request #589 from VOGL-electronic/sdram_efinix_trion_t20 
efinix_trion_t20: add sdram
 2024-06-19 08:18:19 +02:00
Gwenhael Goavec-Merou 70fb3de96c targets: All boards based on Zynq7000: remove csr definition and GP0 connection to the SoC: now handled by zynq700 core CPU 2024-06-19 07:59:24 +02:00
Gwenhael Goavec-Merou efd6c8b0aa targets/alinx_axu2cga,xilinx_zcu216,xilinx_kv260: remove csr definition and GP0 connection to the SoC: now handled by znqmp core CPU 2024-06-19 07:54:50 +02:00
Florent Kermarrec 07881259a5 litex_acorn_baseboard_mini: Assert cleanups. 2024-06-18 17:41:01 +02:00
Florent Kermarrec 6857418deb litex_acorn_baseboard_mini: Allow simultaneous pcie and ethernet. 2024-06-18 13:56:08 +02:00
Florent Kermarrec 805a520b5a litex_acorn_baseboard_mini: Fix and test PCIe Gen2 X1 with it. 2024-06-18 09:14:08 +02:00
Gwenhael Goavec-Merou 27b99d4169 targets/lambdaconcept_ecpix5.py: allows configuring eth_ip/remote_ip/dynamic 2024-06-14 15:58:25 +02:00
Gwenhael Goavec-Merou 635e932084 targets/lambdaconcept_ecpix5.py: added argument to select version (r02 by default) 2024-06-14 15:57:11 +02:00
Florent Kermarrec 1b22061e93 litex_acorn_baseboard_mini: Add PCIe support (Not yet buildable with Ethernet or SATA due to GTPE2_COMMON sharing). 2024-06-13 17:46:16 +02:00
Fin Maaß 2cd89cdd16 efinix_trion_t20: add sdram 
add sdram of the efinix trion t20 bga256 dev kit.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-06-13 12:16:09 +02:00
Florent Kermarrec ed6ff8f4fe targets: Switch to LiteX byte size definitions. 2024-06-13 10:04:19 +02:00
enjoy-digital 1013a53240
Merge pull request #587 from akioolin/master 
Add HSEDA XC7A35T board support
 2024-06-11 18:50:06 +02:00
Gwenhael Goavec-Merou 8bb3caee5f targets/quicklogic_quickfeather: updated qlal4s3b_cell_macro Clock and Reset signals (similar fix to #1797) 2024-05-30 08:37:14 +02:00
Akio 3c181106b8 Add HSEDA XC7A35T board support 
Add HSEDA XC7A35T board support
 2024-05-21 21:00:27 +08:00
enjoy-digital 7cfc622353
Merge pull request #583 from hansfbaier/alientex_davincipro 
alientek davincipro: fix speedgrade
 2024-04-23 15:54:33 +02:00
Florent Kermarrec a6b8457111 target/efinix_ti60_f225: Add L2 Cache (16KB for now) to improve perfs/Coremark. 2024-04-23 11:45:07 +02:00