Hardware
/
VexRiscv
mirror of https://github.com/SpinalHDL/VexRiscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Commit Graph

  • 2d0ebf1ef5 Flush pipeline after PMP CSR writes Samuel Lindemer 2020-11-25 12:28:16 +0100
  • e0ae46e794 Fix Csr ReadWrite interration with DBusCachedPlugin execute halt Dolu1990 2020-11-16 12:37:48 +0100
  • 832218dbec DBusCachedPlugin increase pendingMax to 64 to hide memory latency when saving a full context Dolu1990 2020-11-16 12:38:29 +0100
  • ba523c627a Fix Csr ReadWrite interration with DBusCachedPlugin execute halt Dolu1990 2020-11-16 12:37:48 +0100
  • dae633aa7d
         Merge pull request #150 from banahogg/patch-1 Dolu1990 2020-11-15 11:25:50 +0100
  • d1691e9478
         Update GCC prebuild instructions for sifive.com reorg banahogg 2020-11-14 17:31:50 -0800
  • c1b0869c21 AesPlugin is now little endian Dolu1990 2020-11-12 15:07:27 +0100
  • 1b2a2ebaca DBusCachedPlugin miss decoded aquire fix Dolu1990 2020-11-12 15:07:07 +0100
  • a070f78a22 Switching to auto-generated version from https://github.com/rdolbeau/VexRiscvBPluginGenerator/ Romain Dolbeau 2020-11-07 11:15:53 +0100
  • 05e725174c AesPlugin added, work with dropbear encryption, seem ok for decryption (barmetal) Dolu1990 2020-11-02 17:14:52 +0100
  • 9abe19317d RegFilePlugin.x0Init do less assumption on other plugin behaviour Dolu1990 2020-11-02 17:01:17 +0100
  • 3e1ded8543 Draft plugin to support the Zbp (permutation) subset of B. Romain Dolbeau 2020-11-01 13:30:54 +0100
  • 97fe279f7b Enable PMP register lock Samuel Lindemer 2020-10-28 14:21:47 +0100
  • dc9246715d Do not allow jtag ebreak outside machine mode Dolu1990 2020-10-28 12:58:24 +0100
  • 4209dc2792 Fix CsrPlugin privilege crossing Dolu1990 2020-10-28 12:57:20 +0100
  • 576e21d75d Do not allow jtag ebreak outside machine mode Dolu1990 2020-10-28 12:58:24 +0100
  • abebeaea1f Fix CsrPlugin privilege crossing Dolu1990 2020-10-28 12:57:20 +0100
  • fc2c8a7c37 Initial commit of PMP plugin Samuel Lindemer 2020-10-20 11:45:22 +0200
  • fe342c347c CfuBusParameter has now a few default values Dolu1990 2020-10-23 11:06:24 +0200
  • f11c75cf3b
         Update main.cpp Elliott.Wen 2020-10-22 15:55:53 +1300
  • b21f0fb29e
         Fix an error in regression test Elliott.Wen 2020-10-22 13:52:35 +1300
  • aa58b5f830
         Update main.cpp Elliott.Wen 2020-10-22 13:50:38 +1300
  • d490f903ea
         Merge pull request #145 from zeldin/bigendian2 Dolu1990 2020-10-21 12:56:56 +0200
  • 6c8e97f825 Update big endian instruction encoding Marcus Comstedt 2020-10-20 18:05:31 +0200
  • 4ece59385d DataCache split redo / refilling execute stage halt Dolu1990 2020-10-19 18:12:20 +0200
  • e58daee088 SpinalHDL++ Dolu1990 2020-10-16 11:25:25 +0200
  • ec55187033 improve LightShifterPlugin arbitration halt timings Dolu1990 2020-10-09 11:37:39 +0200
  • bbaa0520c0
         Fix UserInterruptPlugin interrupt enable Dolu1990 2020-10-09 10:45:23 +0200
  • 8bd1785233
         Merge pull request #141 from betrusted-io/dev-asid Dolu1990 2020-10-04 15:20:02 +0200
  • 72f85ef6c0 Merge remote-tracking branch 'origin/dev' into dev-asid bunnie 2020-10-04 19:53:29 +0800
  • b7e7faebad sbt update Dolu1990 2020-10-04 09:57:34 +0200
  • 65e6f6054b Add ASID field to SATP bunnie 2020-10-04 15:34:58 +0800
  • 98de02051e
         Merge pull request #135 from zeldin/bigendian Dolu1990 2020-10-01 16:43:00 +0200
  • 9d35e75fb5
         Update README.md Dolu1990 2020-10-01 16:41:24 +0200
  • 3f5e771a5c dbus mmu access improvement Dolu1990 2020-09-17 22:06:29 +0200
  • de820daf74 add earlyBranch option to Smp config Dolu1990 2020-09-13 18:33:06 +0200
  • 49488d19af pipeline data cache unaligned access check Dolu1990 2020-09-07 12:01:03 +0200
  • 775b336ee0
         Merge pull request #136 from zeldin/rv32e Dolu1990 2020-09-06 22:23:24 +0200
  • 8e466dd13c Add support for RV32E in RegFilePlugin Marcus Comstedt 2020-09-06 17:05:31 +0200
  • 4c3cad97d3 fix CfuPlugin generation Dolu1990 2020-09-04 10:36:02 +0200
  • c489143442 Add support for big endian byte ordering Marcus Comstedt 2020-08-30 15:17:09 +0200
  • 7dcaa0c390 VexRiscvSmpCluster now avoid useless decoder for plic/clint Dolu1990 2020-08-13 11:26:11 +0200
  • 69d5ba239a Smp config now initialise regfile using logic Dolu1990 2020-07-28 16:15:17 +0200
  • cc423cbe49 Litex cluster add DMA sel feature Dolu1990 2020-07-21 19:42:27 +0200
  • 15bda15bc9 Litex cluster can now set cache layout Dolu1990 2020-07-21 19:35:56 +0200
  • 9f62f37538 improve LitexCluster area for single core configuration Dolu1990 2020-07-21 15:45:02 +0200
  • da666ade49 Add VexRiscvLitexSmpClusterCmdGen Dolu1990 2020-07-21 15:07:32 +0200
  • fe5401f835 BmbGenerators refractoring (bus -> ctrl) Dolu1990 2020-07-16 13:04:25 +0200
  • da73317912 Cleanup BmbGenerators Dolu1990 2020-07-15 20:51:46 +0200
  • 5f0aec7570 BmbInterconnectGenerator refractoring Dolu1990 2020-07-15 17:03:05 +0200
  • 4f5ba6b044 Merge branch 'bmbRework' into dev Dolu1990 2020-07-10 13:06:20 +0200
  • f6931784a5 Merge branch 'smp' into dev Dolu1990 2020-07-10 13:00:50 +0200
  • d0a572de98 Add openroad config bmbRework Dolu1990 2020-07-08 01:37:10 +0200
  • 32f778613f DBusCachedPlugin now support asyncTagMemory Dolu1990 2020-07-08 01:36:58 +0200
  • 60ee7e2b4c Better VexRiscvSmpCluster config Dolu1990 2020-07-08 01:36:40 +0200
  • 51070d0e69 Fix MmuPlugin when used in multi stage config Dolu1990 2020-07-05 13:17:39 +0200
  • 06584518da Remove CsrPlugin redoInterface combinatorial depedency from execut_isStuck Dolu1990 2020-07-05 13:17:07 +0200
  • a404078117 Few fixes Dolu1990 2020-07-05 13:16:39 +0200
  • c51e25f8c4 Litex SoC add coherent DMA master Dolu1990 2020-07-05 13:15:44 +0200
  • 32539dfe6d Got VexRiscvSmpLitexCluster refractoring to work Dolu1990 2020-06-30 22:29:33 +0200
  • 0da94ac66f Bring back smp cluster parameters Dolu1990 2020-06-29 15:49:01 +0200
  • 062509deee Update Bmb brides and comment out SmpCluster for now Dolu1990 2020-06-29 11:44:10 +0200
  • c12f9a378d Fix inv regression smp Dolu1990 2020-06-20 13:18:46 +0200
  • f0f2cf61da D$ inv/ack are now fragment, which ease serialisation of wider invalidations Dolu1990 2020-06-19 15:57:56 +0200
  • c18bc12cb2 Fix DebugPlugin.fromBmb Dolu1990 2020-06-19 15:57:21 +0200
  • 490c1f6b02 cleanup of old todo Dolu1990 2020-06-19 15:56:45 +0200
  • b0cd88c462 SmpCluster now with proper jtag and plic Dolu1990 2020-06-12 16:18:41 +0200
  • 2e8a059c77 Fix travis verilator Dolu1990 2020-06-07 11:33:24 +0200
  • cb5597818d Fix d$ generation crash Dolu1990 2020-06-07 11:29:07 +0200
  • 1f9fce6388 Fix d$ uncached writes exception handeling Dolu1990 2020-06-06 22:12:32 +0200
  • 760d2f74d0 Update litex cluster to implement utime Dolu1990 2020-06-05 13:31:24 +0200
  • d6455817e7 smp cluster now have 2w*4KB of d$ , no more rdtime emulation Dolu1990 2020-06-05 10:43:00 +0200
  • 71760ea372 CsrPlugin now support utime csr to avoid emulation Dolu1990 2020-06-05 10:35:50 +0200
  • 3dafe8708b Cfu update Dolu1990 2020-06-05 10:34:57 +0200
  • 0668046407 More smp cluster profiling Dolu1990 2020-06-05 10:40:51 +0200
  • 97c2dc270c Fix typo Dolu1990 2020-06-04 10:11:30 +0200
  • 89c13bedbd Fix litex smp cluster sim Dolu1990 2020-06-03 16:31:34 +0200
  • 73f88e47cb Fix BmbToLitexDram coherency Dolu1990 2020-06-03 16:29:21 +0200
  • db50f04653 Add litexMpCluster Dolu1990 2020-05-31 16:54:05 +0200
  • 08189ee907 DebugPlugin now support Bmb Dolu1990 2020-06-02 19:13:55 +0200
  • 2942d0652a fix Briey verilator Dolu1990 2020-04-13 13:01:12 +0200
  • 5e5c730959 Add LitexSmpDevCluster with per cpu dedicated litedram ports Dolu1990 2020-05-29 10:56:55 +0200
  • bc4a2c3747 Fix SmpCluster jtag Dolu1990 2020-05-27 14:19:37 +0200
  • 18cce053a3 Improve SingleInstructionLimiterPlugin to also include fetch stages Dolu1990 2020-05-27 14:19:17 +0200
  • a64fd9cf3b Add CsrPlugin external hartid d$ rsp/sync now decrement pendings by signal amount Dolu1990 2020-05-20 13:49:10 +0200
  • 380afa3130 SpinalHDL 1.4.2 Dolu1990 2020-05-20 13:45:52 +0200
  • c3540bc6e0
         SpinalHDL 1.4.2 Dolu1990 2020-05-20 10:37:52 +0200
  • 24b676ce30
         Merge pull request #124 from tomverbeure/uinstret Dolu1990 2020-05-20 10:35:42 +0200
  • b901651ab5 Add default value of NONE to uinstret CSR. Tom Verbeure 2020-05-19 14:48:35 -0700
  • c74b03b4de Add uinstret support. Tom Verbeure 2020-05-19 13:40:46 -0700
  • cf60989ae1 Litex smp cluster now blackboxify d$ data ram Dolu1990 2020-05-14 00:05:54 +0200
  • 42fef8bbcd Smp cluster now use i$ reduceBankWidth Dolu1990 2020-05-12 23:59:19 +0200
  • 685c914227 Add i$ reduceBankWidth to take advantage of multi way by remaping the data location to reduce on chip ram data width Dolu1990 2020-05-12 23:58:28 +0200
  • 0471c7ad76 Fix machineCsr test Dolu1990 2020-05-12 23:55:47 +0200
  • cb44a474fc more smp cluster profiling Dolu1990 2020-05-12 13:25:55 +0200
  • 63511b19a2 smp cluster add more profiling Dolu1990 2020-05-11 10:35:24 +0200
  • b592b0bff8 Add regression TRACE_SPORADIC, LINUX_SOC_SMP regression golden model now properly sync dut exceptions Charles Papon 2020-05-09 17:00:13 +0200
  • 0a159f06b2 update smp config Dolu1990 2020-05-07 22:50:36 +0200
  • 0e76cf9ac8 i$ now support multi cycle MMU Dolu1990 2020-05-07 22:50:25 +0200
  • 41ee8fd226 MmuPlugin now support multiple stages, D$ can now take advantage of that Dolu1990 2020-05-07 13:37:53 +0200