Sebastien Bourdeauducq
e39c470bbc
spi_flash: fix bitbang with spi_width=1
2016-12-26 14:11:49 +01:00
Tim 'mithro' Ansell
b81839bf1a
Raise AttributeError.
...
Makes hasattr work correctly.
2016-12-23 11:14:18 +01:00
Tim 'mithro' Ansell
284c94f1d3
Fix Makefile dependency inclusion for other software.
2016-12-19 14:29:33 +01:00
enjoy-digital
ffc342f49c
Merge pull request #11 from mithro/file-dont-change
...
Only require rebuild on actual changes
2016-12-17 14:43:34 +01:00
Tim 'mithro' Ansell
1f6dc446d2
Allow CSRElement objects to be autocompleted.
2016-12-17 14:14:53 +01:00
Tim 'mithro' Ansell
722edfe9e8
Provide csr_data_width via the constants.
2016-12-17 14:14:53 +01:00
Tim 'mithro' Ansell
8bccd2d988
bios: Include dependency rebuild info.
2016-12-17 14:14:14 +01:00
Tim 'mithro' Ansell
46bbec5494
main.o is not a phony target.
2016-12-15 19:56:58 +01:00
Tim 'mithro' Ansell
4522157ddd
Use write_to_file helper.
2016-12-15 19:51:36 +01:00
Tim 'mithro' Ansell
9d716def9d
Make the csv directory if it doesn't exist.
2016-12-15 17:19:51 +01:00
Florent Kermarrec
daa9473809
soc/software/bios/main: revision command becomes ident
2016-11-30 15:45:06 +01:00
Florent Kermarrec
0f57451f30
soc/software/bios: remove dataflow
2016-11-30 15:44:30 +01:00
whitequark
460185fa8e
litex_term: nicer progress bar
2016-11-30 15:36:13 +01:00
enjoy-digital
7bb2be41e8
Merge pull request #9 from mithro/vprintf-fix
...
libbase: Adding missing vprintf function.
2016-10-30 09:43:43 +01:00
Tim 'mithro' Ansell
548fd33d20
libbase: Adding missing vprintf function.
...
Fixes #8 .
```
int vprintf(const char *format, va_list ap);
The functions vprintf(), vfprintf(), vsprintf(), vsnprintf() are equivalent to
the functions printf(), fprintf(), sprintf(), snprintf(), respectively, except
that they are called with a va_list instead of a variable number of
arguments.
```
2016-10-30 16:25:06 +11:00
Tim 'mithro' Ansell
35ba9cf735
soc/software/Makefile: Fix Makefile depend generation.
...
Previously the flags were not actually set and the *.d files were never
actually generated.
2016-10-28 01:25:47 +11:00
Florent Kermarrec
99f2e31b2e
soc/tools/remote: allow direct use of comm_udp and some fixes
2016-07-18 17:04:58 +02:00
Florent Kermarrec
f193873bb8
soc/tools/remove/comm_uart: limit write bursts to 8 32bits words
2016-05-30 16:16:05 +02:00
Florent Kermarrec
55c9c653e0
adapt to litedram changes
2016-05-04 00:59:02 +02:00
Florent Kermarrec
7a7b9420e6
soc/integration/soc_dram: sync with litedram
2016-05-03 19:44:33 +02:00
Florent Kermarrec
8c7332e75e
soc/integration/soc_sdram: use new LiteDRAM names
2016-04-29 17:40:55 +02:00
Florent Kermarrec
dc52d33fba
soc_sdram: remove minicon support (we will make lasmicon more configurable to reduce ressource usage)
2016-04-29 16:24:24 +02:00
Florent Kermarrec
44d766c09f
software/sdram: cleanup artix7 init
2016-04-29 15:55:10 +02:00
Florent Kermarrec
66362b1280
move sdram code to litedram ( https://github.com/enjoy-digital/litedram )
2016-04-29 07:45:15 +02:00
Florent Kermarrec
80d673e502
soc/integration/soc_sdram: always generate L2_SIZE constant
2016-04-27 12:34:18 +02:00
Florent Kermarrec
4e451a78d6
soc/software/bios/sdram: add sdrlevel_artix7 (bitslip and delays have to be found manually)
2016-04-27 12:33:44 +02:00
Florent Kermarrec
e6681bbb9c
soc/interconnect/wishbone: add FlipFlop (should be removed)
2016-04-25 19:14:20 +02:00
Florent Kermarrec
3d98be0997
use new Record.connect omit parameter (replace leave_out)
2016-04-21 09:39:21 +02:00
Florent Kermarrec
849434c1bd
soc/software/bios: show cpu on first banner line
2016-04-19 09:19:37 +02:00
enjoy-digital
76bb0ef456
Merge pull request #2 from mithro/master
...
More fixes.
2016-04-19 09:07:23 +02:00
Florent Kermarrec
1b9ab2f1fc
soc/integration/cpu_interface: fix clang detection
2016-04-19 08:06:56 +02:00
Tim 'mithro' Ansell
8998ae5c92
bios: Print CPU architecture on boot.
2016-04-19 16:02:26 +10:00
enjoy-digital
e0e56e3655
Merge pull request #1 from mithro/master
...
Bunch of small fixes
2016-04-19 07:49:24 +02:00
Tim 'mithro' Ansell
514496d744
libcompiler_rt: Fixing Makefile for CPU endianness.
2016-04-19 14:55:01 +10:00
Florent Kermarrec
5ba03160ed
soc/cores: fix spi
2016-04-19 06:49:23 +02:00
Florent Kermarrec
7b7f1dd68c
Merge branch 'master' of https://github.com/enjoy-digital/litex
2016-04-19 06:05:22 +02:00
Tim 'mithro' Ansell
e7f3c585b7
Allow using gcc for or1k.
...
* Using CLANG can set by using CLANG=1 or CLANG=0 in the environment.
* or1k continues to default to CLANG if environment is not net.
2016-04-19 14:03:24 +10:00
Tim 'mithro' Ansell
2f834d0aa2
bios: Use single characters for boot modes.
...
* The function keys never really worked properly.
* Also add commands for the ROM/Flash/etc.
2016-04-19 13:42:56 +10:00
Florent Kermarrec
429f533bd0
soc/cores/sdram/settings: simplify modules and fix timing margins computation
2016-04-18 18:22:53 +02:00
Florent Kermarrec
41f6408d56
Merge branch 'master' of https://github.com/enjoy-digital/litex
2016-04-15 08:09:42 +02:00
Florent Kermarrec
3d222d9e63
soc/interconnect/dma_lasmi: change endpoint names
2016-04-13 18:28:52 +02:00
Florent Kermarrec
fcd8d792a1
Merge branch 'master' of https://github.com/enjoy-digital/litex
2016-04-13 01:19:21 +02:00
Florent Kermarrec
6e0045e6be
soc/integration/soc_sdram: allow passing controller settings in register_sdram
2016-04-12 20:16:47 +02:00
Florent Kermarrec
40eb779e67
software/include/base: fix system.h for or1k
2016-04-10 17:21:54 +02:00
Florent Kermarrec
238d69f186
software/common: use -std=gnu99 for GCC
2016-04-10 17:21:17 +02:00
Florent Kermarrec
b2eaf412c1
soc/interconnect/stream/PipelinedActor: add latency attribute
2016-04-07 12:10:32 +02:00
Florent Kermarrec
9fa9bdcf68
build/sim: adapt verilator simulation to new stream signals
2016-04-07 08:56:53 +02:00
Florent Kermarrec
8ced064160
soc/software/libcompiler_rt: fix mulsi3 compilation
2016-04-07 08:28:38 +02:00
Florent Kermarrec
80d78698e3
soc/software/libnet/microudp: fix debug flag
2016-04-07 08:28:38 +02:00
Florent Kermarrec
454d5d13e2
soc/software: fix libcompiler_rt mulsi3.c compile
2016-04-04 08:36:23 +02:00
Florent Kermarrec
17f6cb1f17
initial RISC-V support (with picorv32), still some software to do (manage IRQ, L2 cache flush)
2016-04-01 00:09:17 +02:00
Florent Kermarrec
7e62cdf601
soc/software/bios: update default ip addresses (local: 192.168.1.50 / remote: 192.168.1.100)
2016-03-31 10:55:11 +02:00
Florent Kermarrec
1d4f44e7db
soc/interconnect/stream_sim: add more genericity to PacketStreamer/PacketLogger to use them for all cores
2016-03-31 00:02:22 +02:00
Florent Kermarrec
b8d89535fd
soc/cores/sdram/phy: fix S6QuarterRateDDRPHY
2016-03-29 14:59:30 +02:00
Florent Kermarrec
9517b9b870
soc/interconnect/stream_sim: use passive generators and some cleanup
2016-03-23 01:04:33 +01:00
Florent Kermarrec
cf29ee0b91
soc/interconnect/stream_sim: adapt to new simulator
2016-03-21 19:56:43 +01:00
Florent Kermarrec
71a719be44
soc/interconnect/stream: use valid/ready/last signals instead of stb/ack/eop (similar to AXI)
2016-03-16 20:13:47 +01:00
Florent Kermarrec
9032665750
soc/interconnect/wishbonebridge: fix import
2016-03-16 19:34:50 +01:00
Florent Kermarrec
d7112efdba
soc/interconnect/stream_packet: remove Buffer (we will use simple fifo for now)
2016-03-16 19:33:29 +01:00
Florent Kermarrec
39aacf2df4
soc/interconnect/stream: remove busy signal, BufferizeEndpoints refactoring
2016-03-16 19:33:00 +01:00
Florent Kermarrec
e0e2427795
soc: replace all Sink/Source with stream.Endpoint
2016-03-16 18:05:57 +01:00
Florent Kermarrec
c860581b86
soc/interconnect/stream: use new Converter/StrideConverter
2016-03-16 17:00:58 +01:00
Florent Kermarrec
8c272c1f6f
soc/interconnect/stream: fix missing param
2016-03-16 16:21:32 +01:00
Florent Kermarrec
cb47373383
soc/interconnect/stream: remove packetized parameter and use of sop
2016-03-16 11:54:28 +01:00
Florent Kermarrec
44a5b95281
soc/interconnect/stream: set packetized to True by default (we are going to remove this parameter)
2016-03-15 15:52:57 +01:00
Florent Kermarrec
a016ededa0
soc/integration/builder: remove use of symlinks (simply use make -C dst_dir -f src_dir/Makefile, thanks robert)
2016-03-04 20:56:05 +01:00
Florent Kermarrec
042c36ee1b
soc/tools/litex_term: continue cleanup
2016-02-19 17:44:25 +01:00
Florent Kermarrec
2fa848c15f
soc/tools/litex_term: continue cleanup
2016-02-19 14:35:18 +01:00
Florent Kermarrec
247ecc5d8a
soc/tools/litex_term: continue cleanup
2016-02-19 13:38:34 +01:00
Florent Kermarrec
ed2e623994
soc/tools/litex_term: remove write_exact, use more bytes
2016-02-19 00:20:10 +01:00
Florent Kermarrec
4bdefbdfba
soc/tools/litex_term: remove character function
2016-02-19 00:02:38 +01:00
Florent Kermarrec
5b8566d20f
soc/tools/litex_term: replace get_file_data with f.read()
2016-02-18 23:55:41 +01:00
Florent Kermarrec
68c2d3b7a0
soc/tools/remove: fix import
2016-02-18 12:55:18 +01:00
Florent Kermarrec
8ee3874088
soc/integration/soc_core: instanciate wishbone/csr/interrupts only if we have at least a wishbone master
2016-02-18 00:11:25 +01:00
Florent Kermarrec
2218ece98a
soc/interconnect/stream: fix merge issue (missing params connect)
2016-02-01 00:08:27 +01:00
Florent Kermarrec
6c71811138
soc/tools/litex_term: also rename inside file
2016-01-16 21:26:33 +01:00
Florent Kermarrec
601c91a3e2
soc/tools: rename to litex_term, litex_server, litex_client
2016-01-16 21:22:21 +01:00
Florent Kermarrec
162900144a
soc/tools/remove_server: cleanup
2016-01-16 21:12:19 +01:00
Florent Kermarrec
b856b54720
soc/tools/flterm: get rid of serial.tools.miniterm import and fix echo on linux
2016-01-16 21:05:03 +01:00
Florent Kermarrec
002508a69a
soc/integration: return vns with soc and builder
2016-01-14 17:15:39 +01:00
Florent Kermarrec
2c32791a28
soc/software/bios/main: add capability to configure TEST_USER_ABORT_DELAY
2016-01-14 16:53:04 +01:00
Florent Kermarrec
492f276247
soc/software/bios/main: give priority to romboot over serialboot/netboot
2016-01-14 16:46:42 +01:00
Florent Kermarrec
7b879b36c6
soc/tools/remove/server: avoid closing server when client closes connection
2015-12-27 22:33:08 +01:00
Florent Kermarrec
0498a31818
some cleanup
...
- remove Sink/Source connect specialization.
- remove use of Record.connect
- use sink/source on Buffer
2015-12-27 13:09:58 +01:00
Florent Kermarrec
219fbef26c
soc/tools/remove/client: set socket timeout to 5s
2015-12-27 11:26:58 +01:00
Florent Kermarrec
6ea65f957c
soc/interconnect/stream: expose Endpoint
2015-12-19 21:49:45 +01:00
Florent Kermarrec
3191533889
soc/software/libnet: add debug defines on microudp
2015-12-07 12:03:36 +01:00
Florent Kermarrec
4fed1cc7a7
soc/integration/builder: move csr_csv generation outside of generate include
...
we mostly use csr_csv for designs without CPU
2015-12-03 15:16:22 +01:00
Florent Kermarrec
b7a1888a36
gen/fhdl/verilog: add regular comb parameter to allow implementation of simulation code (for icarus)
...
We will remove that when we will be using new migen simulator
2015-12-02 14:16:23 +01:00
Florent Kermarrec
f6aeb6e41a
soc/interconnect/stream: improve Pipeline to allow passing endpoints
2015-11-28 18:31:47 +01:00
Florent Kermarrec
d85d2b7b9b
soc/interconnect/stream_packet: add check of field's width vs signal's width in Header.get_field
2015-11-27 20:14:01 +01:00
Florent Kermarrec
c24727ab4c
soc/integration: allow using builder with soc.cpu_type == None
2015-11-26 17:44:50 +01:00
Florent Kermarrec
7298fff1e6
soc/interconnect/stream_packet: fix Counter removing
2015-11-24 20:30:53 +01:00
Florent Kermarrec
8ebffc563a
soc/tools/remote/csr_builder: manage memory regions and some fixes on CSRRegister
2015-11-23 19:13:37 +01:00
Florent Kermarrec
254504e73f
soc/integration/builder: export constants and memory_regions with csr_csv
2015-11-23 19:12:58 +01:00
Florent Kermarrec
f6a2d5847a
soc/tools/remote/client: make csr_csv parameter optional and default value to None
2015-11-23 18:39:28 +01:00
Florent Kermarrec
6f4dd14ffa
soc/software/boot: add #ifndef on LOCALIP and REMOTEIP to allow definition in the SoC with add_constant
2015-11-23 11:08:04 +01:00
Florent Kermarrec
8056653004
soc/tools/remote/server: add --debug parameter
2015-11-17 15:43:10 +01:00
Florent Kermarrec
6870707620
soc/tools/remoter/server: fix exit on KeyboardInterrupt
2015-11-17 15:31:23 +01:00
Florent Kermarrec
8ff31557c6
soc/tools/remoter/server: add some printfs
2015-11-17 15:18:46 +01:00
Florent Kermarrec
1a92489555
soc/tools/remote: add comm_pcie and comm_udp (to be tested)
2015-11-17 15:07:00 +01:00
Florent Kermarrec
d6fdd76930
soc/tools/remote: small cleanup and remove csr_data_width from server side
2015-11-17 11:35:22 +01:00
Florent Kermarrec
71483b8935
soc/tools: initialize wishbone remote control (for now only uart)
2015-11-17 01:05:52 +01:00
Florent Kermarrec
1cde84dccf
soc/cores/uart remove software (will be re-written and will move to soc/tools)
2015-11-16 17:07:22 +01:00
Florent Kermarrec
1f80bb9561
soc/interconnect/stream_packet: remove Counter
2015-11-16 16:53:23 +01:00
Florent Kermarrec
ec35290c45
soc/interconnect/wishbonebridge: remove Counter
2015-11-16 16:48:37 +01:00
Florent Kermarrec
2f52d364af
soc/interconnect/stream/SyncFIFO: expose fifo level
2015-11-16 16:11:31 +01:00
Florent Kermarrec
7ed2576ce1
soc/integration/cpu_interface: add bases, constants and memories output to csv files
2015-11-15 00:04:44 +01:00
Florent Kermarrec
af909b43d5
soc/cores/uart: add UARTWishboneBridgeDriver software
2015-11-14 21:23:20 +01:00
Florent Kermarrec
3a2e6117f4
soc/interconnect/stream: add Cast and others small fixes
2015-11-14 12:17:09 +01:00
Florent Kermarrec
041483dbe1
soc/integration/builder: only copy Makefiles when not using symlinks
2015-11-14 03:36:46 +01:00
Florent Kermarrec
a2aa5726bf
soc/cores: remove liteeth_mini and use liteeth
2015-11-14 03:22:43 +01:00
Florent Kermarrec
16ba646b1b
add TODOs
2015-11-14 03:15:10 +01:00
Florent Kermarrec
cf4c7da2e7
fix soc/integration/soc_core.py
2015-11-14 02:44:12 +01:00
Florent Kermarrec
032f5a9620
soc/interconnect: add stream_sim
2015-11-14 00:43:49 +01:00
Florent Kermarrec
ba959c832d
soc/interconnect: rename packet to stream_packet
2015-11-14 00:42:58 +01:00
Florent Kermarrec
fc3ffe87ac
for now use our fork of migen (to be able to simulate our designs)
2015-11-13 18:31:46 +01:00
Florent Kermarrec
7d6cee6751
soc/interconnect/stream: add BufferizeEndpoints
2015-11-12 18:54:15 +01:00
Florent Kermarrec
83427c87cd
soc/interconnect/stream: add Pipeline
2015-11-12 01:41:23 +01:00
Florent Kermarrec
81c6facca2
soc/interconnect/stream: reintroduce params
2015-11-12 01:12:15 +01:00
Florent Kermarrec
f6b30fcae2
soc/interconnect: add packet
2015-11-12 00:54:40 +01:00
Florent Kermarrec
525da89c7d
soc/interconnect: add wishbonebridge and uart bridge
2015-11-12 00:52:36 +01:00
Florent Kermarrec
89b189ce4a
soc/interconnect/stream: reintroduce PipelinedActor/Buffer
2015-11-12 00:51:32 +01:00
Florent Kermarrec
194e6137ae
soc/integration/soc_core: add support for SoCs without CPU
2015-11-12 00:50:23 +01:00
Florent Kermarrec
352cb91688
soc/integration/builder: add use_symlinks parameter and desactivate symlinks by default
...
On windows machines, console need to be run as Administrator to create symlinks which is bit painful.
2015-11-11 17:37:28 +01:00
Florent Kermarrec
1f6983da2c
soc/cores/liteeth_mini: add phy model for verilator simulation
2015-11-11 14:22:27 +01:00
Florent Kermarrec
481163b233
soc/cores: reintroduce liteeth_mini (until we switch to liteeth)
2015-11-11 14:01:48 +01:00
Florent Kermarrec
714a3d88e2
add LICENSE, update copyrights, add Migen install instructions
2015-11-11 13:22:39 +01:00
Florent Kermarrec
bda196fbc8
soc/software/bios/sdram: split memtest and allow external #define of memtest sizes
2015-11-11 13:10:03 +01:00
Florent Kermarrec
619cd8e695
avoid forking migen, we will add custom modules in litex/gen but will use upstream migen for common modules
2015-11-11 12:10:55 +01:00
Florent Kermarrec
3f43a49382
soc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45990101b
...
changes:
-software/bios: remove dataflow
-cores/identifier: replace with user-defined string
-interconnect/CSRBankArray: support read-only mappings
-targets: Added Numato Mimas V2 target
-Our libunwind changes were merged upstream.
-wishbone: update TODO
-replace Counter in Converters
-Fix CSRBankArray
-flterm: properly exit on ^C.
2015-11-10 16:51:51 +01:00
Florent Kermarrec
3297210e48
boards/targets/sim: get SDRAM working in simulation with sdram/model
2015-11-10 12:57:23 +01:00
Florent Kermarrec
4afe4a07e4
soc/software: remove memtest (should be re-written)
2015-11-10 12:22:08 +01:00
Florent Kermarrec
6764c06b62
soc/sofware: remove libdyld
2015-11-10 12:21:23 +01:00
Florent Kermarrec
f72e172ac3
soc/software: remove libunwind
2015-11-10 12:16:34 +01:00
Florent Kermarrec
a775672314
litex: get verilator simulation working and add sim target as example
2015-11-07 23:51:37 +01:00
Florent Kermarrec
6a0f85dc42
litex: reorganize things, first work working version
2015-11-07 17:48:55 +01:00
Florent Kermarrec
b028569784
import misoc in litex/soc
2015-11-07 12:19:30 +01:00
