Sebastien Bourdeauducq
a20688f777
fhdl/simplify/FullMemoryWE: fix WE slice for multi-port mems
2013-12-13 00:02:50 +01:00
Sebastien Bourdeauducq
adda930c68
fhdl/simplify: add FullMemoryWE decorator that splits memories to remove partial WEs
2013-12-12 17:37:31 +01:00
Sebastien Bourdeauducq
adffec35f6
utils/misc: add gcd_multiple function to compute GCD or any number of integers
2013-12-12 17:36:50 +01:00
Sebastien Bourdeauducq
c13fe1bc63
specials/Memory: allow for more flexibility in memory port signals
2013-12-12 17:36:17 +01:00
Sebastien Bourdeauducq
135a4fea25
fhdl/verilog: fix representation of negative integers
...
Give the explicit two's complement representation for the given bit width.
This results in less readable code compared to using unary minus,
but fixes a bug when trying to represent the most negative integer.
2013-12-11 22:26:10 +01:00
Robert Jordens
d6cb981c7a
migen/test/test_signed: add a (currently failing) signed comparison testcase
2013-12-10 23:33:53 +01:00
Robert Jordens
487df5b174
migen/fhdl/bitcontainer: fix signed arrays (map is an iterator)
2013-12-10 23:32:12 +01:00
Robert Jordens
8d3d61ba98
fhdl.size: rename to bitcontainer
2013-12-03 22:51:52 +01:00
Robert Jordens
86ba9c8bbc
migen.fhdl.size: verify fslice for negative values
2013-12-03 21:39:37 +01:00
Robert Jordens
c71eb5778f
migen.fhdl.structure: have Cat() flat_iteration-ize its arguments
2013-12-03 21:36:33 +01:00
Robert Jordens
1bf133755e
migen.fhdl.tools: move flat_iteration to migen.util.misc as tools imports other things
2013-12-03 21:36:33 +01:00
Robert Jordens
fe67210d77
migen.fhdl.size: add fiter(), fslice(), and freversed()
...
do not overload __len__, __iter__, __reversed__ as not all valid
expressions (ints and bools) have them. furthermore len([]) is and
should be different from flen([]) (the later raises an error). keep
__getitem__ as an exception that proves the rule ;)
2013-12-03 21:36:33 +01:00
Sebastien Bourdeauducq
ae6b78faeb
genlib/divider: fix diff computation
2013-12-02 17:56:03 +01:00
Robert Jordens
dd24fdd356
genlib/sort: add bitonic, combinatorial sorter
...
complete with with api documentation and unittests
2013-12-02 12:56:36 +01:00
Robert Jordens
9762546c95
genlib/cordic: cleanup, documentation, unittests
2013-12-02 12:56:24 +01:00
Robert Jordens
e54fa6f5f4
migen/test: if SimCase is a TestCase, it's run in every module that imports it
2013-12-02 12:43:14 +01:00
Robert Jordens
4eef3b9399
migen/test/support: allow easy re-setUp of the testbench with different parameters
2013-12-02 12:42:59 +01:00
Sebastien Bourdeauducq
de830dc743
mibuild: use keyword arguments directly in build_cmdline
2013-12-01 17:56:07 +01:00
Robert Jördens
5b26fb10a9
genlib/coding: add docstrings, add it to api doc
2013-11-29 23:25:31 +01:00
Robert Jördens
5ccd1799f2
genlib/coding, test/test_coding: unittests
2013-11-29 23:25:03 +01:00
Sebastien Bourdeauducq
205908791a
test/test_fifo: do not use relative import
...
This way the test can simply be run with:
python -m unittest test_fifo.py
2013-11-29 23:18:03 +01:00
Robert Jördens
502a2871bc
test/test_fifo, genlib/fifo: move test to unittest
2013-11-29 23:11:53 +01:00
Robert Jördens
cb5e0953aa
migen/test: start unittests
2013-11-29 23:11:23 +01:00
Robert Jördens
55afab2276
sim: use Simulator as a contextmanager
...
__del__ garbage collector callbacks are too delicate. E.g. imported
modules can be garbage collected before the objects using them. Can't
use os.remove, socket.SHUT_RDWR...
* added a DeprecationWarning if a Simulator is garbage collected without
having its .close() called
* renamed all gc __del__ callbacks to close()
* implemented context manager hooks for Simulator. Use like
with Simulator(TestBench()) as s:
s.run()
2013-11-29 23:05:15 +01:00
Sebastien Bourdeauducq
be9fea182d
fhdl/structure: clarify usage restrictions of LHS Cat
2013-11-29 22:35:53 +01:00
Robert Jördens
73db4944f1
fhdl.structure: document the API
2013-11-29 22:31:55 +01:00
Robert Jördens
e469e5e539
genlib.fifo: fix docstring section syntax
2013-11-29 22:31:51 +01:00
Sebastien Bourdeauducq
e1b31ec455
genlib/fifo: clarify we behaviour when writable=0
2013-11-28 22:31:10 +01:00
Robert Jordens
6e9e0a60eb
setup API documentation, start by documenting fifos
2013-11-28 22:14:20 +01:00
Sebastien Bourdeauducq
fa741f54fd
specials/Instance: add PreformattedParam
2013-11-25 12:09:51 +01:00
Sebastien Bourdeauducq
29f7b94e37
bus/wishbone/sram: expose memory component
2013-11-24 23:43:14 +01:00
Sebastien Bourdeauducq
c5342c5b5c
bus/wishbone: style
2013-11-24 23:42:54 +01:00
Sebastien Bourdeauducq
948d7e7332
lasmibus/Crossbar: more flexible master assignment
2013-11-23 17:51:22 +01:00
Robert Jordens
7e4024beb3
genlib/fsm: rename {entering,leaving} to after_{entering,leaving}, add before_{entering,leaving}
2013-11-21 23:30:24 +01:00
Sebastien Bourdeauducq
cdabf34bee
flow/isd: update to new APIs
2013-11-20 17:45:09 +01:00
Florent Kermarrec
416c8af1e2
plumbing: use Record.connect in Multiplexer/ Demultiplexer
2013-11-04 21:22:05 +01:00
Florent Kermarrec
7e2859f43f
util: add missing __init__.py
2013-11-04 21:22:02 +01:00
Sebastien Bourdeauducq
c3aad93753
actorlib/spi/DMAWriteController: make ack_when_inactive a keyword-only arg
2013-11-02 23:21:05 +01:00
Florent Kermarrec
e0e99ec385
actorlib/spi: add ack_when_inactive parameter to DMA Write Controller
...
In some cases we don't want to stall the input pipeline when the DMA is inactive, setting ack_when_inactive to True will enable acknowledge of data when the DMA is inactive.
2013-11-02 23:16:05 +01:00
Sebastien Bourdeauducq
b4a7d36fa5
flow/plumbing/muxdemux: use existing connect() method instead of new function
2013-11-02 23:15:03 +01:00
Sebastien Bourdeauducq
7170ae3a67
flow/actor: Record.connect no longer takes kwargs
2013-11-02 23:14:32 +01:00
Florent Kermarrec
84966af098
flow/plumbing: add Multiplexer and Demultiplexer
2013-11-02 23:09:47 +01:00
Sebastien Bourdeauducq
f658802ff8
replace use of __dict__ with dir()/xdir()
2013-11-02 16:03:47 +01:00
Sebastien Bourdeauducq
892c12bff5
flow: add AbstractActor busy signals
2013-10-25 18:50:14 +02:00
Sebastien Bourdeauducq
99c53ed9e8
Better record layout parameterization mechanism
2013-10-23 12:54:50 +02:00
Sebastien Bourdeauducq
98f79021cd
Revert "genlib/record: support passing params in same object"
...
This reverts commit 018afe57ef
.
2013-10-22 15:23:00 +02:00
Sebastien Bourdeauducq
b782db14fc
Revert "genlib/fifo: support RecordP"
...
This reverts commit c0d2b5a789
.
2013-10-22 15:22:40 +02:00
Sebastien Bourdeauducq
c0d2b5a789
genlib/fifo: support RecordP
2013-10-21 22:30:06 +02:00
Sebastien Bourdeauducq
018afe57ef
genlib/record: support passing params in same object
2013-10-21 22:05:28 +02:00
Sebastien Bourdeauducq
4fb3e970b1
genlib/fsm: add entering/ongoing/leaving methods
2013-09-06 14:51:18 +02:00
Sebastien Bourdeauducq
91422788ef
actorlib/fifo: do not duplicate safe write logic
2013-09-04 17:33:53 +02:00
Sebastien Bourdeauducq
523565be63
actorlib/spi/DMAController: use EventSourceProcess
2013-09-04 17:29:42 +02:00
Florent Kermarrec
b6eb97e49f
actorlib/spi: add optional irq generation on DMAController
2013-09-04 17:27:57 +02:00
Sebastien Bourdeauducq
1209ec17f6
actorlib/fifo: rewrite
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* use classes for less code duplication
* the idea of decorator is to avoid passing common parameters (e.g. clock domain names) in module constructors, so remove those parameters
* style
2013-09-04 17:22:50 +02:00
Florent Kermarrec
71b14ac873
actorlib: add fifo
2013-09-04 17:15:22 +02:00
Sebastien Bourdeauducq
dac10f5570
bus/wb2lasmi: use existing interface to determine WB width to be consistent with other modules
2013-08-26 20:33:34 +02:00
Sebastien Bourdeauducq
2cf6b6c768
wishbone/SRAM: fix non-32-bit bus
2013-08-26 20:32:59 +02:00
Florent Kermarrec
33ca4d778f
wishbone2lasmi: configurable data width
2013-08-26 20:29:12 +02:00
Florent Kermarrec
628fa8ce9e
wishbone : add DownConverter
2013-08-26 20:28:09 +02:00
Florent Kermarrec
a653a6144b
wishbone2lasmi : add support for 32 bits lasmim data width
2013-08-20 18:49:46 +02:00
Florent Kermarrec
37930d70ac
genlib/misc: improve genericity of split/displacer/chooser
2013-08-20 18:49:02 +02:00
Nina Engelhardt
6f9f08f6eb
add ternary operator sel ? a : b
2013-08-12 13:15:56 +02:00
Nina Engelhardt
e12187aa80
add += operator to fragment
2013-08-12 13:15:05 +02:00
Sebastien Bourdeauducq
fdf022a04b
fhdl: improve naming of related signals
2013-08-08 19:22:17 +02:00
Sebastien Bourdeauducq
2c580fff03
fhdl/namer: detect leaf nodes better
2013-08-08 12:22:58 +02:00
Sebastien Bourdeauducq
eb1417c5ed
fhdl: move insert_resets to tools
2013-08-08 11:32:58 +02:00
Sebastien Bourdeauducq
305c6985bc
fhdl: support for naming related signals
2013-08-08 11:32:37 +02:00
Sebastien Bourdeauducq
146a1b5d51
namer: add HUID suffix step
2013-08-08 00:15:18 +02:00
Sebastien Bourdeauducq
fd34b75fb4
namer: split by numbers
2013-08-07 23:22:40 +02:00
Sebastien Bourdeauducq
0e369318bb
treeviz: support multiline labels
2013-08-07 21:46:03 +02:00
Sebastien Bourdeauducq
ceddd8afa4
treeviz: improve layout of unbalanced trees
2013-08-07 18:32:02 +02:00
Sebastien Bourdeauducq
7a243171bd
fhdl/namer: new namer with explicit tree
2013-08-07 17:13:52 +02:00
Sebastien Bourdeauducq
cc5ff7a772
add tree visualizer
2013-08-07 15:52:35 +02:00
Nina Engelhardt
efa7dc9cf4
fhdl/edif: adjust for use with mibuild
2013-08-03 10:54:06 +02:00
Nina Engelhardt
7372c7a97c
fhdl/edif: add support for inout signals
2013-08-03 10:51:24 +02:00
Sebastien Bourdeauducq
0e195da3c0
bank/csrgen: add get_offset function to pre-calculate register addresses
2013-08-02 23:05:54 +02:00
Sebastien Bourdeauducq
2a296aced7
bank/description/AutoCSR: prefix csr/mem only once
2013-08-02 23:05:21 +02:00
Nina Engelhardt
17002fb05e
fhdl: add EDIF back-end
2013-07-31 22:47:43 +02:00
Sebastien Bourdeauducq
246b860a85
csr: new data width API
2013-07-28 16:33:36 +02:00
Sebastien Bourdeauducq
6ba0d4bd0d
bus/wishbone: configurable data width
2013-07-27 22:25:07 +02:00
Sebastien Bourdeauducq
14ed5c1acc
genlib/record: support abstract signal width
2013-07-27 22:18:06 +02:00
Sebastien Bourdeauducq
7e20320b9d
pytholite/io: len -> flen
2013-07-27 15:38:48 +02:00
Sebastien Bourdeauducq
04ec60541c
pythloite/ExprCompiler: attempt compile-time evaluation first
2013-07-27 15:38:29 +02:00
Sebastien Bourdeauducq
f62eff0309
bus/csr/Initiator: correct read latency
2013-07-27 15:37:47 +02:00
Sebastien Bourdeauducq
e05f520cdf
actorlib/spi: remove unused function
2013-07-27 15:36:42 +02:00
Nina Engelhardt
61b8958953
fix synthesis translate on/off switch
2013-07-26 15:55:16 +02:00
Sebastien Bourdeauducq
9c7ad6b05b
fhdl: RenameClockDomains decorator
2013-07-26 15:42:14 +02:00
Sebastien Bourdeauducq
cec8fc4ca4
fhdl/specials/Instance: fix item sorting
2013-07-26 14:00:29 +02:00
Robert Jordens
6e1195415e
genlib/roundrobin: fix n==1 case (correctly)
2013-07-26 09:33:33 +02:00
Robert Jordens
b8ff2f2792
genlib/roundrobin.py: fix n==1 case
2013-07-26 00:41:08 +02:00
Sebastien Bourdeauducq
b96eb339af
fhdl: compact Instance syntax
2013-07-25 20:34:19 +02:00
Sebastien Bourdeauducq
b7ed19c6c5
fhdl: do not export Fragment
2013-07-25 18:52:54 +02:00
Sebastien Bourdeauducq
b367932498
fhdl: introduce module decorators
2013-07-25 17:56:31 +02:00
Sebastien Bourdeauducq
cabae0c32b
genlib: remove direct uses of Fragment
2013-07-24 19:25:14 +02:00
Robert Jördens
fe18397acc
wishbone.py: add Crossbar (concurrent/parallel/many-to-many interconnect)
2013-07-22 10:30:44 +02:00
Robert Jördens
5bc9a0b383
fsm.py: set reset_state
2013-07-22 10:30:40 +02:00
Sebastien Bourdeauducq
411e6ec114
fhdl/tools: do not export resort_statements
2013-07-17 16:50:09 +02:00
Sebastien Bourdeauducq
d5d2e64dc3
Revert "fhdl/tools/group_by_target: remove resort_statements"
...
This reverts commit 939f01cee2
.
2013-07-17 16:49:26 +02:00
David Carne
9190568685
genlib/fifo/AsyncFIFO: fix data corruption bug
2013-07-17 12:10:39 +02:00
Sebastien Bourdeauducq
939f01cee2
fhdl/tools/group_by_target: remove resort_statements
2013-07-17 10:38:39 +02:00
David Carne
16ebe41028
fhdl/tools: BUGFIX: fix group_by_target grouping
...
group_by_target does not properly combine target groups if statements
are presented in the order:
({A}, statement1)
({B}, statement2)
({A, B}, statement3)
which returns groups:
({A, B}, [statement1, statement3])
({B}, [statement2])
This patch fixes group_by_target such that the resulting group is:
({A, B}, [statement1, statement2, statement3])
2013-07-17 10:14:39 +02:00
Sebastien Bourdeauducq
5b36f688ea
Remove ASMI
2013-07-16 18:50:50 +02:00
David Carne
faa8b7c49a
fhdl/tools: clock domain merging for clock renaming
2013-07-16 18:17:44 +02:00
Sebastien Bourdeauducq
b016a60b85
lasmibus: fix master locking
2013-07-15 21:45:07 +02:00
Sebastien Bourdeauducq
7083764b53
genlib/fifo: add test bench
2013-07-15 21:36:39 +02:00
Sebastien Bourdeauducq
65a0b12812
actorlib/spi/DMAController: export length/storage/trigger
2013-07-13 17:13:15 +02:00
Sebastien Bourdeauducq
6595b9a111
actorlib/spi/SingleGenerator: export CSRs
2013-07-13 17:12:51 +02:00
Sebastien Bourdeauducq
c2d6f14087
flow/actor/PipelinedActor: clean up
2013-07-12 18:52:34 +02:00
Sebastien Bourdeauducq
6aa1e0c199
actorlib/spi/DMAWriteController: len -> flen
2013-07-11 19:22:56 +02:00
Florent Kermarrec
f5ddd33e7e
dfi: split phase description
2013-07-10 19:56:47 +02:00
Sebastien Bourdeauducq
43fe16ef73
bus/lasmibus: add separate req/data ack to target and initiator
2013-07-10 19:09:51 +02:00
Sebastien Bourdeauducq
af6ef0a3b4
dma_lasmi/Writer: fix default FIFO depth
2013-07-07 20:01:55 +02:00
Sebastien Bourdeauducq
fa8112c3f5
dma_lasmi/Reader: handle ack=1 when stb=0
2013-07-07 18:57:05 +02:00
Sebastien Bourdeauducq
7e6fbd31a4
lasmibus/crossbar: simplify master ack generation
2013-07-07 18:56:43 +02:00
Sebastien Bourdeauducq
b68c00d36f
pytholite: fix kwargs handling
2013-07-03 17:20:05 +02:00
Sebastien Bourdeauducq
0aa58f5dcf
pytholite: support generator arguments
2013-07-03 16:35:07 +02:00
Sebastien Bourdeauducq
04efee7847
fhdl: mark variable as deprecated
2013-06-30 20:14:20 +02:00
Sebastien Bourdeauducq
71b89e4c46
fhdl/verilog: lower complex slices before reset insertion
2013-06-30 14:32:47 +02:00
Sebastien Bourdeauducq
ded5e569eb
fhdl/tools: separate complex slice lowerer from basic lowerer
2013-06-30 14:32:19 +02:00
Sebastien Bourdeauducq
9c59ea1e26
genlib/misc: remove bitreverse
2013-06-30 14:31:25 +02:00
Robert Jördens
a255296171
support re-slicing and non-unit step size
...
* support slicing of Slice/Cat/Replicate through lowering
* support non-unit step size slices through unpacking and Cat()
2013-06-30 14:03:34 +02:00
Robert Jördens
9d241f8cd3
coding.py: rewrite If() to make verilog more readable
2013-06-30 11:39:47 +02:00
Sebastien Bourdeauducq
b0d467d744
pytholite: use eval instead of literal_eval
2013-06-28 19:03:55 +02:00
Robert Jördens
ecc4062071
genlib/coding.py: binary vs. one-hot, priority coding
2013-06-28 15:20:01 +02:00
Sebastien Bourdeauducq
48a5b86dcd
genlib/cordic: cleanup
2013-06-26 22:46:04 +02:00
Sebastien Bourdeauducq
080afdc3f9
fhdl/verilog: fix signedness rules for comparison
2013-06-26 22:45:47 +02:00
Robert Jordens
0224ea01cb
migen/genlib/cordic.py: generic cordic
...
* rotating or vectoring cordic modes
* circular, linear, or hyperbolic functions
* combinatorial, pipelined or iterative evaluation
* arbitrary width, stages and guard bits
* two or four quadrant mode for circular/rotate
2013-06-26 22:31:36 +02:00
Sebastien Bourdeauducq
d0caa738bd
FSM: new API
2013-06-25 22:17:39 +02:00
Sebastien Bourdeauducq
b56cb3cefc
fhdl/verilog: improve error reporting
2013-06-24 19:44:25 +02:00
Sebastien Bourdeauducq
d6f7b4cee6
lasmi: separate request and data ack to support bankmachine FIFOs (buggy/incomplete)
2013-06-17 23:36:03 +02:00
Sebastien Bourdeauducq
5cd0019231
genlib/fifo: support records
2013-06-17 23:35:10 +02:00
Sebastien Bourdeauducq
6d6d232cad
lasmibus/crossbar: better switching policy
2013-06-15 16:51:09 +02:00
Sebastien Bourdeauducq
ac2cde0e87
asmibus: remove port sharing
2013-06-14 18:34:36 +02:00
Sebastien Bourdeauducq
0c52c08989
bus/asmibus: fix slot aging timer
2013-06-14 17:57:43 +02:00
Sebastien Bourdeauducq
1ec1fb9ebe
bus/lasmibus/Crossbar: support cba_shift=0
2013-06-11 18:15:49 +02:00
Sebastien Bourdeauducq
fe54c68762
lasmi: fix minor problems
2013-06-10 22:49:33 +02:00
Sebastien Bourdeauducq
aea3b59432
genlib/fsm: fix handling of zero delayed_enter
2013-06-10 22:49:05 +02:00
Sebastien Bourdeauducq
3a284b9c1e
actorlib: LASMI DMA (untested)
2013-06-10 22:29:39 +02:00
Sebastien Bourdeauducq
932bfa7e75
bus: Wishbone -> LASMI bridge (untested)
2013-06-10 18:52:07 +02:00
Sebastien Bourdeauducq
f2e2397c9d
bus/lasmibus: bugfixes
2013-06-09 23:36:32 +02:00
Sebastien Bourdeauducq
a836cba790
bus/lasmibus: add target and initiator
2013-06-09 16:03:22 +02:00
Sebastien Bourdeauducq
35f9f2e9d7
bus/lasmi: interface definition and crossbar (untested)
2013-06-08 15:49:50 +02:00
Kenneth Ryerson
85813b3b58
csr/sram: fix reads on high addresses when word_bits != 0
2013-06-03 21:52:23 +02:00
Kenneth Ryerson
e5e3492afe
csr/sram: fix page_bits computation
2013-06-03 21:51:44 +02:00
Sebastien Bourdeauducq
cebfe787db
genlib/misc: fix import
2013-05-30 18:46:52 +02:00
Sebastien Bourdeauducq
ebbd5ebcd2
bus/csr/SRAM: better handling of writes to memories larger than the CSR width
2013-05-30 18:45:04 +02:00
Sebastien Bourdeauducq
f0b0942055
bitreverse: fhdl/tools -> genlib/misc
2013-05-30 18:44:37 +02:00
Sebastien Bourdeauducq
bac62a32a9
Make memory ports part of specials
...
This is needed to handle cases where a single memory has ports
in two different modules, and one of these modules is subject
to clock domain remapping. The clock domain of the port in that
module only must be remapped.
2013-05-28 16:11:34 +02:00
Sebastien Bourdeauducq
70ffe86356
New migen.fhdl.std to simplify imports + len->flen
2013-05-22 17:11:09 +02:00
Sebastien Bourdeauducq
5208baada8
bus/wishbone/SRAM: support init and read_only
2013-05-19 20:53:54 +02:00
Sebastien Bourdeauducq
7ada0159fd
bus/csr/SRAM: support init
2013-05-19 20:53:37 +02:00
Sebastien Bourdeauducq
792b8fed1b
bus/asmi: port sharing support
2013-05-12 15:58:39 +02:00
Sebastien Bourdeauducq
f202946717
fhdl/tools/_TargetLister: do not include array keys in targets
2013-05-11 17:28:41 +02:00
Sebastien Bourdeauducq
0ec6a7eb4e
genlib/record: match_by_position -> connect_flat
2013-05-11 11:48:21 +02:00
Sebastien Bourdeauducq
955a9733c8
Revert "genlib/record/connect: add match_by_position"
...
This reverts commit df1ed32765
.
2013-05-10 17:41:51 +02:00
Sebastien Bourdeauducq
c82b53f1cd
bank/description/AutoCSR: add autocsr_exclude
2013-05-08 20:58:57 +02:00
Sebastien Bourdeauducq
10212e85e7
dma_asmi: cleanup
2013-05-08 18:58:50 +02:00
Sebastien Bourdeauducq
b9b6df6f29
bank/eventmanager: refactor, rename EventSourceLevel -> EventSourceProcess, add fully externally controlled event source
2013-05-08 18:12:26 +02:00
Sebastien Bourdeauducq
7a74dae461
actorlib/spi: add DMAWriteController
2013-05-04 17:38:54 +02:00
Sebastien Bourdeauducq
fd089b146f
actorlib/dma_asmi/OOOWriter: fix tag offset
2013-05-04 17:38:17 +02:00
Sebastien Bourdeauducq
12deaa91d8
flow/network/DataFlowGraph: add_buffered_connection
2013-05-02 13:25:30 +02:00
Sebastien Bourdeauducq
b5b29f6d5d
bank/description/CSRStorage: set reset property of storage for use in test benches
2013-05-02 11:49:23 +02:00
Sebastien Bourdeauducq
8ffa273719
flow/network: better determination of plumbing layout
2013-05-01 22:13:26 +02:00
Sebastien Bourdeauducq
471393d0f9
actorlib/dma_asmi: drive dat_wm
2013-05-01 21:52:26 +02:00
Sebastien Bourdeauducq
c8810a016f
actorlib/spi: add DMA read controller
2013-04-30 18:55:01 +02:00
Sebastien Bourdeauducq
c70c71502e
actorlib/spi/SingleGenerator: use CSR alignment bits
2013-04-30 18:54:47 +02:00
Sebastien Bourdeauducq
dc0304a87b
bank/description/CSRStorage: support alignment bits
2013-04-30 18:53:40 +02:00
Sebastien Bourdeauducq
51f1ace061
flow/network/CompositeActor: expose unconnected endpoints
2013-04-30 18:53:02 +02:00
Sebastien Bourdeauducq
4f13c5b74d
flow/network/DataFlowGraph: add add_pipeline
2013-04-30 15:49:51 +02:00
Sebastien Bourdeauducq
fb83794ef4
actorlib/spi/Collector: cleanup, new APIs
2013-04-28 18:32:46 +02:00
Sebastien Bourdeauducq
746e452838
actorlib/dma_asmi: support for writes
2013-04-28 18:06:36 +02:00
Sebastien Bourdeauducq
e97edd7253
genlib/fifo: disable retiming on Gray counter outputs
2013-04-25 14:57:07 +02:00
Sebastien Bourdeauducq
156ef43ace
genlib/cdc: add NoRetiming
2013-04-25 14:56:45 +02:00
Sebastien Bourdeauducq
b862b070d6
fhdl/verilog: recursive Special lowering
2013-04-25 14:56:26 +02:00
Sebastien Bourdeauducq
67c3119249
genlib/fifo: add asynchronous FIFO
2013-04-25 13:30:37 +02:00
Sebastien Bourdeauducq
fee228a09f
fhdl/specials/memory: do not write address register for async reads
2013-04-25 13:30:05 +02:00
Sebastien Bourdeauducq
6c08cd67aa
graycounter: expose binary output
2013-04-25 13:11:15 +02:00
Sebastien Bourdeauducq
0f9df2d732
genlib: add Gray counter
2013-04-24 19:13:36 +02:00
Florent Kermarrec
f599fe4ade
Support for resetless clock domains
2013-04-23 11:54:05 +02:00
Sebastien Bourdeauducq
8e11fcf1d0
bus/csr/SRAM: fix Module conversion errors
2013-04-14 13:55:04 +02:00
Sebastien Bourdeauducq
ea63389823
fhdl: support len() on all values
2013-04-14 13:50:26 +02:00
Sebastien Bourdeauducq
75d33a0c05
fhdl/verilog/_printinit: initialize undriven Special inputs (bug reported by Florent Kermarrec)
2013-04-11 18:55:49 +02:00
Sebastien Bourdeauducq
72ef4b9683
ioo+pytholite: use new Module API
2013-04-10 23:42:46 +02:00
Sebastien Bourdeauducq
4c9018ea17
fhdl/visit: add TransformModule
2013-04-10 23:42:14 +02:00
Sebastien Bourdeauducq
746acdacd1
ioo: move to genlib
2013-04-10 22:28:53 +02:00
Sebastien Bourdeauducq
1cc4c8ee9f
uio: remove Trampoline (Python 3.3 provides generator delegation instead)
2013-04-10 22:15:28 +02:00
Sebastien Bourdeauducq
6ce856290a
flow: match record fields by position
2013-04-10 21:33:56 +02:00
Sebastien Bourdeauducq
df1ed32765
genlib/record/connect: add match_by_position
2013-04-10 21:33:45 +02:00
Sebastien Bourdeauducq
692794a21f
flow: use Module and new Record APIs
2013-04-10 19:12:42 +02:00
Sebastien Bourdeauducq
20bdd424c8
flow: adapt to new Record API
2013-04-01 22:15:23 +02:00
Sebastien Bourdeauducq
29b468529f
bus: replace simple bus module with new bidirectional Record
2013-04-01 21:54:21 +02:00
Sebastien Bourdeauducq
6a3c413717
New bidirectional-capable Record API
2013-04-01 21:53:33 +02:00
Sebastien Bourdeauducq
c4f4143591
New CSR API
2013-03-30 17:28:41 +01:00
Sebastien Bourdeauducq
633e5e6747
fhdl/module/finalize: pass additional args to do_finalize
2013-03-30 11:29:46 +01:00
Sebastien Bourdeauducq
574becc1fc
fhdl/specials: clean up clock domain handling
2013-03-26 11:58:34 +01:00
Sebastien Bourdeauducq
77a0f0a3bb
actorlib/structuring/Cast: support inversion
2013-03-25 15:54:09 +01:00
Sebastien Bourdeauducq
c4c4765a4e
bank/csrgen/BankArray: retain name information
2013-03-25 14:44:15 +01:00
Sebastien Bourdeauducq
53edc3557e
bank/description/Register: add get_size
2013-03-25 14:43:44 +01:00
Sebastien Bourdeauducq
3da98ea04d
genlib/record: use getattr instead of __dict__
2013-03-24 00:51:01 +01:00
Sebastien Bourdeauducq
1897b74f97
genlib/record: add eq
2013-03-24 00:50:33 +01:00