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1588 commits

Author SHA1 Message Date
Florent Kermarrec
f87513ab92 liblitesdcard/sdcard: increase SDCARD_CLK_FREQ to 50MHz. 2020-07-28 14:36:49 +02:00
Florent Kermarrec
9518ccf453 integration/soc/etherbone: expose ethcore (useful to combine udp/etherbone). 2020-07-27 19:57:29 +02:00
Florent Kermarrec
9e07623b61 integration/soc: fix dma_bus typo. 2020-07-27 11:06:09 +02:00
enjoy-digital
8a0684b15e
Merge pull request #604 from antmicro/jboc/axi-lite 
Improve AXI Lite data width converters
 2020-07-24 14:54:11 +02:00
Jędrzej Boczar
879e6ffe73 soc/interconnect/axi: add basic AXI Lite up-converter 2020-07-24 13:47:18 +02:00
Sean Cross
dd366467ed litex: add sphinx_extra_config to generate_docs() 
This allows us to append additional strings to the sphinx `conf.py`.

Signed-off-by: Sean Cross <sean@xobs.io>
 2020-07-24 16:01:54 +08:00
Jędrzej Boczar
32160e615f soc/interconnect/axi: separate AXI Lite converter channels 2020-07-24 09:25:57 +02:00
Florent Kermarrec
041c7527ce core/cpu: integrate Zynq as a classical CPU (Zynq7000), deprecate SoCZynq. 
This is the logical continuation of the recent change to avoid specific SoC classes.
A Zynq FPGA can be used with or without the PS7. When used without the PS7, a softcore CPU
can be used as with others FPGAs. When using the PS7, the softcore is replaced with the PS7
and connected to the SoC through one of the AXI GP interface.

An example is available on litex-boards.
 2020-07-23 17:40:46 +02:00
Florent Kermarrec
8bdf6941a3 liblitesdcard/sdcard: use max divider of 256 (128 was not enough for the initial 400Khz clock frequency). 2020-07-22 23:15:36 +02:00
enjoy-digital
99e88dfc0b
Merge pull request #600 from antmicro/jboc/axi-lite 
Implement AXI Lite interconnect
 2020-07-22 23:03:07 +02:00
Florent Kermarrec
d38048baac soc: add initial DMA bus support (optionally provided by CPU(s) for cache coherency). 
When provided, the modules doing DMA shall connect the DMA to the dma_bus to allow the CPU(s) to manage cache coherency
and avoid the manual cache flushes.

This has been tested with VexRiscv SMP and LiteSDCard doing DMA while loading Linux binaries.
 2020-07-22 18:44:37 +02:00
Jędrzej Boczar
367eb12240 soc/integration: use AXILiteSRAM when using bus_standard="axi-lite" 2020-07-22 17:16:33 +02:00
Jędrzej Boczar
706bc25dc1 soc/integration: add bus standard parser arguments 2020-07-22 17:16:33 +02:00
Jędrzej Boczar
32d9e212c5 soc/interconnect/axi: improve Timeout module and test it with shared interconnect 2020-07-22 17:16:33 +02:00
Jędrzej Boczar
2cab7fbf0f test/axi: add shared AXI Lite interconnect tests 2020-07-22 17:16:33 +02:00
Jędrzej Boczar
3a08b21d44 soc/interconnect/axi: implement AXI Lite decoder 2020-07-22 17:16:33 +02:00
Jędrzej Boczar
214cfdcaeb soc/interconnect/axi: lock AXILiteArbiter until all requests have been responded to 2020-07-22 17:16:33 +02:00
Jędrzej Boczar
a8a583d6b4 socinterconnect/axi: interconnect shared sketch 2020-07-22 17:16:26 +02:00
Jędrzej Boczar
f47ccdae99 soc/interconnect/axi: point-to-point interconnect and timeout module with tests 2020-07-22 17:16:12 +02:00
Jędrzej Boczar
b4c1120e3d soc/integration: choose interconnect based on bus standard 2020-07-22 17:16:07 +02:00
Jędrzej Boczar
69d8dd788d soc/integration: add axi-lite standard to SoCBusHandler 2020-07-22 17:13:28 +02:00
Florent Kermarrec
1f27b7405e soc/integration/add_sdcard: add direct connection to VexRiscv's dmabus for testing. 2020-07-21 19:54:42 +02:00
Florent Kermarrec
408d1a9f5d cpu/vexriscv/system.h: update flush_cpu_dcache. 2020-07-21 19:43:00 +02:00
Florent Kermarrec
47ce15b431 interconnect/wishbone: add minimal UpConverter. 2020-07-21 19:35:14 +02:00
enjoy-digital
9fc488bdf6
Merge pull request #597 from antmicro/jboc/litex-buildenv-add-adapter-fix 
Fix Vivado crash when using 1:1 wishbone.Converter
 2020-07-20 23:11:01 +02:00
enjoy-digital
b92519502a
Merge pull request #595 from betrusted-io/master 
wire up missing register bits.
 2020-07-20 22:47:16 +02:00
Ilia Sergachev
8656ea9b67 interconnect/csr_bus: fix paged access warning 2020-07-20 18:23:09 +02:00
Jędrzej Boczar
07bc589c41 fix/Vivado: don't instantiate wishbone.Converter in add_adapter when not needed 
Fixes an issue with Vivado which crashes with SIGSEGV when building litex-buildenv at:
cc003bef3a
and litex bumped to 4a18b828bc,
with options:
    CPU=mor1kx; CPU_VARIANT=linux; PLATFORM=arty; FIRMWARE=linux; TARGET=net
The only difference in Verilog is that we avoid creating new Interface and doing
`new_interface.connect(interface)`, so this shouldn't make any difference, but
this somehow generates the error in Vivado (tested on v2018.3 and v2019.2).
 2020-07-20 15:26:21 +02:00
Florent Kermarrec
4a18b828bc software/liblitesdcard/spisdcard: remove optimization on receive_block (not working on all configs) and increase max clk_freq to 20MHz. 2020-07-20 13:48:49 +02:00
Florent Kermarrec
100aa5a4ca soc/cores/spi/SPIMaster: rewrite/simplify. 
- Make sure MOSI is latched on start, MISO is stable during Xfer (last value).
- Allow clk_divider down to 2.
- improve test errors reporting with hex() on AssertEqual.
 2020-07-20 10:44:18 +02:00
bunnie
53a567daef wire up missing register bits. 
Not sure how they went missing...but just noticed them.
 2020-07-19 03:00:25 +08:00
Florent Kermarrec
63c19ff45f liblitesdcard/spisdcard: update comments. 2020-07-17 15:39:39 +02:00
Florent Kermarrec
1f34f6ef00 soc/cores/spi: make sure done and miso are synchronous. 2020-07-17 15:38:52 +02:00
Florent Kermarrec
754f140a9d spisdcard: revert to 8-bit SPI, optimize spisdcardreceive_block and reduce clk to 12.5MHz for now. 2020-07-17 11:58:26 +02:00
Florent Kermarrec
8143f1a08b soc/cores/spi: make sure miso is stable during xfer. 2020-07-17 11:56:27 +02:00
Florent Kermarrec
ac35e158c1 bios/boot: add bootargs support on netboot/sdcardboot to optionally specify r1/r2/r3/addr. 
For example:
{
	"Image":  "0x40000000",
	"bootargs": {
		"r1":  "0x12345678",
	}
}

will copy Image to 0x40000000 and set r1 to 0x12345678.

By default, r1,r2,r3 are set to 0 and addr is the address if the last loaded image, so:

{
	"Image":         "0x40000000",
	"rootfs.cpio":   "0x40800000",
	"rv32.dtb":      "0x41000000",
	"emulator.bin":  "0x41100000",
}

is equivalent to:

{
	"Image":         "0x40000000",
	"rootfs.cpio":   "0x40800000",
	"rv32.dtb":      "0x41000000",
	"emulator.bin":  "0x41100000",
	"bootargs": {
		"r1":   "0x00000000",
		"r2":   "0x00000000",
		"r3":   "0x00000000",
		"addr": "0x00000000",
	}
}
 2020-07-16 18:12:11 +02:00
Jędrzej Boczar
229da572ff soc/interconnect/axi: propagate response errors in AXILiteDownConverter 2020-07-16 17:16:35 +02:00
Jędrzej Boczar
93bcc94b53 soc/interconnect/axi: implement AXILite down-converter 2020-07-16 17:02:49 +02:00
Jędrzej Boczar
0be607dad9 soc/integration: revert bus argument for add_ram/add_rom 2020-07-16 10:26:12 +02:00
Jędrzej Boczar
2700ec3ce5 soc/integration: use AXILiteConverter (dummy implementation) in add_adapter() 2020-07-15 15:59:16 +02:00
Jędrzej Boczar
f3072d4984 soc/interconnect/axi: add connect methods for convenience 2020-07-15 15:48:40 +02:00
Jędrzej Boczar
78a631f392 test/axi: add AXILite2CSR and AXILiteSRAM tests 2020-07-15 12:40:39 +02:00
Jędrzej Boczar
a5be2cd257 soc/interconnect/axi: improve SRAM/CSR access speed 2020-07-15 11:44:14 +02:00
Jędrzej Boczar
d8a242d86f soc/interconnect: add AXILite SRAM 2020-07-15 10:58:34 +02:00
Jędrzej Boczar
b692b2a3f1 soc/interconnect: add AXILite2CSR bridge 2020-07-15 10:36:34 +02:00
Jędrzej Boczar
35149c4e80 soc/integration: update add_adapter to convert between AXILite/Wishbone 2020-07-14 16:31:46 +02:00
enjoy-digital
e76464167b
Merge pull request #587 from antmicro/mor1x_ror_instruction 
mor1kx: Do not generate the ror instruction
 2020-07-10 11:21:13 +02:00
Florent Kermarrec
468db3cf08 integration/soc/sdcard: add mode parameter to enable read only, write only or read+write modes. 2020-07-10 11:18:22 +02:00
Mateusz Holenko
b8d900862c mor1kx: Do not generate the ror instruction 
The mor1kx core does not support `l.ror` instruction
by default, but gcc/clang flags allowed the
compiler to generate it.
 2020-07-10 11:07:12 +02:00
Florent Kermarrec
b7e4507686 core/cpu/CPUNone: set endianness to little. 2020-07-10 10:42:00 +02:00
Filipe Laíns
235e8cf62b
cpu: add a few missing GCC toolchains 
This names are used by Arch Linux for eg.

Signed-off-by: Filipe Laíns <lains@archlinux.org>
 2020-07-09 15:58:33 +01:00
Florent Kermarrec
5ebdfd9307 liblitesdcard/sdcard: clamp divider value. 2020-07-09 13:09:36 +02:00
enjoy-digital
23085cffea
Merge pull request #584 from ozbenh/memtest 
Memtest/memspeed improvements
 2020-07-09 12:54:42 +02:00
Florent Kermarrec
5c332e4b58 cores/dma: add stream.last support on WishboneDMAReader. 2020-07-09 12:18:09 +02:00
Benjamin Herrenschmidt
83d24d087d memspeed: Write a fixed value 
Otherwise we have at least an extra addition in the loop
which squews the result compared to the read loop.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 2020-07-08 17:13:37 +10:00
Florent Kermarrec
b54b3b3362 interconnect/avalon: minor cleanup, remove max on SyncFIFO depth. 2020-07-08 07:53:42 +02:00
Benjamin Herrenschmidt
c0b948d4f9 memtest: Fix memspeed access size 
The move to libbase reverted the type of the pointer
from long to int.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 2020-07-08 13:21:45 +10:00
Benjamin Herrenschmidt
798b3d7ba4 memtest: Fix integer size/type printf errors 
In a couple of places, memtest uses %x to print a pointer which
is illegal (and could be problematic on 64-bit). Use %p instead.

Additionally, use %ld when printing longs

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 2020-07-08 13:17:48 +10:00
Florent Kermarrec
8af4e05c7f software/litesdcard: use new clocking and use slow clock during initialization. 2020-07-07 19:59:50 +02:00
Florent Kermarrec
52f36b1257 integration/soc/sdcard: cleanup emulator integration, fix sim. 2020-07-07 15:05:07 +02:00
Florent Kermarrec
7602977c16 integration/soc: move pads.rst control to PHY. 2020-07-07 14:58:06 +02:00
Florent Kermarrec
23dfefb9be software/liblitesdcard: improve sdcard_init and handle errors. 2020-07-07 11:03:26 +02:00
Florent Kermarrec
8d76509032 litesdcard: use new Block2Mem/Mem2Block DMAs. 2020-07-07 09:24:08 +02:00
Gabriel Somlo
6fdb36b84a liblitesdcard/sdcard: adjust card-ready timeout 
Testing on nexys4ddr and rocket, approximately 12 iterations of the
timeout loop (using `busy_wait(1)`) are needed to receive a "ready"
response from the SDcard, assuming a "warm" reset where the card has
already been previously initialized.

If the SDcard is ejected and re-inserted, or if the board is "cold-reset"
(e.g., reprogrammed via openocd vs. a simple push of the reset button),
it takes approximately 450 iterations before the SDCard responds with a
"ready" message.

In either case, a timeout of 10 is insufficient. This patch increases
the busy-wait to 10, and the timeout loop counter to 128, which should
cover most cases.

Additionally, make a few minor cosmetic improvements.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2020-07-06 17:38:07 -04:00
Florent Kermarrec
e473c6f29e liblitesdcard/sdcard: add timeout when waiting card to be ready. 2020-07-06 20:07:20 +02:00
Florent Kermarrec
31d4d7c22c liblitesdcard/sdcard: use new SDClocker enable CSR. 2020-07-06 18:59:28 +02:00
Florent Kermarrec
f0a97791a9 interconnect/csr_bus: move/rewrite paged access warning. 
Was incorrectly triggered with csr_data_width=32.
 2020-07-06 12:26:24 +02:00
Florent Kermarrec
9e46195299 interconnect/csr_bus: remove 64-bit CSR bus alignment support (no longer supported in SoCs). 2020-07-06 09:51:32 +02:00
Gabriel Somlo
c52731d1f1 liblitesdcard/sdcard: return error code outside '#ifdef SDCARD_DEBUG' 2020-07-04 15:24:05 -04:00
Gabriel Somlo
499d291daa liblitesdcard/sdcard: cosmetic: fix indentation, eliminate redundant counter 2020-07-04 15:22:28 -04:00
Florent Kermarrec
31a9273c6d litesdcard: use new clocker. 2020-07-03 20:06:42 +02:00
Florent Kermarrec
ee8da87e41 liblitesdcard/sdcard: use new register names and new software initalization register. 2020-07-03 19:30:06 +02:00
Florent Kermarrec
e6b94b1663 interconnect/stream: allow empty description/payload on Endpoint. 2020-07-03 19:29:05 +02:00
Florent Kermarrec
2f6b27da23 litelitesdcard/sdcard: remove wait workaround and replace remove SDCARD_MULTIPLE_BLOCK_SUPPORT define (replace it with SDCARD_CMD23_SUPPORT). 2020-07-03 18:48:43 +02:00
Florent Kermarrec
94821cb73c litesdcard: update integration. 2020-07-03 14:57:40 +02:00
Florent Kermarrec
2c53f9b2ff interconnect/stream: add ClockDomainCrossing wrapper around AsyncFIFO. 2020-07-03 14:39:31 +02:00
Florent Kermarrec
23a95bea1d integration/soc/etherbone: always run ethcore in eth_tx clock domain and remove clock_domain parameter. 
This avoid issues when sys_clk_freq < eth_tx clock like sys_clk_freq < 125MHz with 1Gbps link.
 2020-07-02 11:38:54 +02:00
Pawel Sagan
16a0aebcad i2s: Fix the incorrect TX fifo almost empty offset 2020-07-01 13:32:53 +02:00
Florent Kermarrec
8f204e7797 sdcard: rename cd_sdcard to cd_sd to avoid unnecessary clock domain. 2020-07-01 12:50:24 +02:00
Florent Kermarrec
42bfb90f14 liblitesdcard/sdcard: add SDCARD_MULTIPLE_BLOCK_SUPPORT define. 2020-07-01 12:40:23 +02:00
Florent Kermarrec
e492e96bf7 integration/soc/add_sdcard: update SDEmulator. 2020-07-01 12:39:56 +02:00
Florent Kermarrec
54598ed2f8 software/bios/Makefile: fix #578 merge. (get back #579). 2020-06-29 17:01:36 +02:00
Florent Kermarrec
7beffba187 software/libbase/memtest: fix bus errors reporting. 2020-06-29 16:46:03 +02:00
sadullah
caf520c854 clean Makefile 2020-06-28 21:23:56 -04:00
sadullah
9256a4db6d minor change in BP top module 2020-06-28 13:10:24 -04:00
sadullah
7c83a1b858 syn with master blackparrot, upgrade BP to IMA 2020-06-28 13:07:59 -04:00
enjoy-digital
dae23f2a82
Merge pull request #576 from betrusted-io/deprecate_slave 
Deprecate slave terminology
 2020-06-27 09:35:04 +02:00
Florent Kermarrec
1e605fb23d liblitesdcard/sdcard: update with litesdcard. 2020-06-26 20:10:10 +02:00
Florent Kermarrec
34e9d12ef2 interconnect/axi/AXIStreamInterface: add tuser support. 2020-06-26 08:36:16 +02:00
Florent Kermarrec
4094a6ec3a liblitesdcard/sdcard: increase busy_wait and use common timeout. 2020-06-25 20:07:39 +02:00
Florent Kermarrec
e8f84c96a7 liblitesdcard/sdcard: decode cid only when SDCARD_DEBUG is set. 2020-06-25 13:48:49 +02:00
Florent Kermarrec
c07703124f liblitesdcard/sdcard_read: enable multiple block read. 
>10MB/s read speed with a 25MHz clock.
 2020-06-25 13:46:39 +02:00
Florent Kermarrec
c466900322 software/bios/litesdcard: remove sdcard_set_clk. 2020-06-25 11:12:40 +02:00
Florent Kermarrec
dfa3768d0e integration/soc/add_sdcard: remove sdclk. 2020-06-25 11:12:17 +02:00
bunnie
0b4c5059f2 Deprecate slave terminology 
http://oshwa.org/a-resolution-to-redefine-spi-signal-names
 2020-06-25 17:12:12 +08:00
Florent Kermarrec
9a27465d1d cores/clock/S6DCM: add expose_drp. 
From LiteSDCard SDClockerS6.
 2020-06-25 10:11:42 +02:00
Florent Kermarrec
d8aa9a42e4 software/bios/boot: improve printfs. 2020-06-25 09:58:08 +02:00
Florent Kermarrec
55e0193701 software/libase/memtest: improve printfs and add progress bar on data test. 2020-06-25 09:57:29 +02:00
Florent Kermarrec
497413664e libbase/progress: reduce to 40 HASHES_PER_LINE. 2020-06-25 09:56:13 +02:00
Florent Kermarrec
52d7f59af5 software/liblitedram: remove DDRPHY_CMD_DELAY support (no longer useful). 2020-06-25 09:01:33 +02:00