Florent Kermarrec
|
745f2a060a
|
bench/targets: Use full imports.
|
2022-05-02 13:07:29 +02:00 |
|
Florent Kermarrec
|
3f84cc9116
|
ddr3_mr_gen: Also display RZQ/x on configured electrical settings.
|
2022-02-24 16:33:46 +01:00 |
|
Florent Kermarrec
|
70c1491d1c
|
ddr3_mr_gen: Display RZQ/x with --list (Useful for comparison with MIG's settings expressed in RZQ/x).
|
2022-02-24 14:44:02 +01:00 |
|
Florent Kermarrec
|
5f722a1513
|
bench/test: Avoid use of ident_version (should fix CI).
|
2022-02-15 17:33:31 +01:00 |
|
Florent Kermarrec
|
4326fe7f36
|
bench/kcu105/xcu1525: Also use PHYPadsReducer to easily test various DFI sizes.
|
2021-07-13 14:57:42 +02:00 |
|
Florent Kermarrec
|
5a4ed3d204
|
bench/arty/kc705: Use PHYPadsReducer to easily test various DFI sizes.
|
2021-07-09 17:58:40 +02:00 |
|
Florent Kermarrec
|
afd00f7873
|
bench/common/bench_test: Improve UART dump speed.
|
2021-06-29 12:38:44 +02:00 |
|
Florent Kermarrec
|
e90aa5a4d5
|
bench/targets: Minor CRG cleanups.
|
2021-06-29 12:36:02 +02:00 |
|
Florent Kermarrec
|
6256031d51
|
bench: Update build directories and add rst in CRG (triggered on CPU reboot).
|
2021-04-22 14:57:13 +02:00 |
|
Florent Kermarrec
|
c2a779df46
|
bench: Update test targets (add_csr no longer required).
|
2021-04-19 13:40:17 +02:00 |
|
Florent Kermarrec
|
5cd192a708
|
bench: Remove soc_sdram import (No longer useful and deprecated).
|
2021-03-30 08:49:54 +02:00 |
|
Florent Kermarrec
|
f17037fdb2
|
bench/common: Cleanup, Increase sys_clk measure time to 5s.
|
2021-03-12 14:29:43 +01:00 |
|
Florent Kermarrec
|
3f9759b83b
|
bench/xcu1525: Update build directories.
|
2021-03-12 10:59:06 +01:00 |
|
Florent Kermarrec
|
df5f555842
|
bench: Update with recent changes.
|
2021-03-12 10:25:11 +01:00 |
|
Florent Kermarrec
|
c29c898af4
|
platforms/targets: switch to LiteX-Boards.
|
2021-01-04 14:11:32 +01:00 |
|
Florent Kermarrec
|
596615a238
|
bench/common: add progress to load_rom.
|
2020-12-10 19:22:46 +01:00 |
|
Florent Kermarrec
|
a87c468afa
|
bench: use --sys-clk-freq=xy to reconfigure frequency and fix Ultrascale.
|
2020-12-10 19:06:19 +01:00 |
|
Florent Kermarrec
|
efb1975d00
|
bench/arty: add missing eth clock.
|
2020-12-10 13:43:31 +01:00 |
|
Florent Kermarrec
|
75f87538a5
|
bench: use common load_bios function.
|
2020-12-10 11:21:21 +01:00 |
|
Florent Kermarrec
|
ea63480253
|
bench/targets: add identifier.
|
2020-12-10 11:12:45 +01:00 |
|
Florent Kermarrec
|
c472499131
|
bench/targets: add optional analyzer on all test targets.
|
2020-12-10 08:44:35 +01:00 |
|
Florent Kermarrec
|
c83e10dafe
|
bench: cleanup clocking on Ultrascale targets.
|
2020-11-06 16:14:22 +01:00 |
|
Florent Kermarrec
|
9a50f6ece6
|
bench/ddr4_mr_gen.py: change default cl to 9 (cl value for sys_clk_freq=125e6).
|
2020-11-06 14:44:36 +01:00 |
|
Florent Kermarrec
|
4d1f4d5052
|
bench/xcu1525: use specific output_dir per channel (to allow // build of bitstreams for the different channels).
|
2020-11-06 10:47:26 +01:00 |
|
Florent Kermarrec
|
0890908a63
|
bench/xcu1525: rename ddram_channel arg to channel (since it's a dram specific design).
|
2020-11-06 10:36:56 +01:00 |
|
Florent Kermarrec
|
5cfdf77654
|
bench/targets: simplify BIST integration using new add_sdram with_bist parameter.
|
2020-11-06 10:34:26 +01:00 |
|
Florent Kermarrec
|
51b8eb1f82
|
bench: add xcu1525 target.
|
2020-10-29 19:11:23 +01:00 |
|
Florent Kermarrec
|
a95c6883cc
|
bench/targets: uniformize.
|
2020-10-29 18:58:37 +01:00 |
|
Florent Kermarrec
|
256cc1b78b
|
bench/genesys2: add optional BIST.
|
2020-10-29 15:12:17 +01:00 |
|
Florent Kermarrec
|
b24943e691
|
bench/genesys2: add litescope on ddrphy.dfi.
|
2020-10-08 16:21:02 +02:00 |
|
Florent Kermarrec
|
e69dbd2d91
|
bench: add DDR3 Mode Register settings generator.
Useful to change timing/electrical settings dynamically and bringup/debug DDR3 on new hardware.
|
2020-09-24 17:51:22 +02:00 |
|
Florent Kermarrec
|
5257197475
|
bench: add DDR4 Mode Register settings generator.
Useful to change timing/electrical settings dynamically and bringup/debug DDR4 on new hardware.
|
2020-09-24 14:57:14 +02:00 |
|
Florent Kermarrec
|
06544c6547
|
bench: uniformize targets with 125MHz clock and Etherbone.
|
2020-09-24 13:03:07 +02:00 |
|
Florent Kermarrec
|
6fc6174c38
|
bench/genesys2: expose uart parameter.
|
2020-09-17 08:22:17 +02:00 |
|
Florent Kermarrec
|
6a5f2fdb09
|
bench/genesys2: add uart_name parameter.
Useful when Etherbone is just used to reload BIOS.
|
2020-09-14 18:43:33 +02:00 |
|
Florent Kermarrec
|
020cff1970
|
bench/genesys2: add back Etherbone (faster for BIOS dev) and add --load-bios/set-sys_clk arguments.
|
2020-09-14 10:55:16 +02:00 |
|
Florent Kermarrec
|
6a75aa0ad7
|
bench/common: add s7_load_bios/s7_set_sys_clk functions.
|
2020-09-14 10:54:35 +02:00 |
|
Florent Kermarrec
|
7eeea34c4e
|
bench: use 115200bauds UART on all targets (fast enough and simplify switch betwen targets).
|
2020-09-14 10:05:55 +02:00 |
|
Florent Kermarrec
|
543a94dd33
|
bench/common: enable load_rom on kcu105 (with delay workaround).
|
2020-09-03 17:46:50 +02:00 |
|
Florent Kermarrec
|
7d0dac78c5
|
bench/kcu105: add a second pll to reduce frequency steps.
|
2020-08-28 19:03:44 +02:00 |
|
Florent Kermarrec
|
1fb78fa558
|
bench: cleanup, do more testing on 7-series.
|
2020-08-28 17:57:59 +02:00 |
|
Florent Kermarrec
|
248c5de517
|
bench: switch to UARTBone to simplify (and to allow testing boards without ethernet capability) and improve test.
|
2020-08-28 03:47:49 +02:00 |
|
Florent Kermarrec
|
6f2462b731
|
bench: add kc705.
|
2020-08-27 19:05:17 +02:00 |
|
Florent Kermarrec
|
d3502e6a9b
|
bench: add common.py with common bench test code.
|
2020-08-27 19:05:05 +02:00 |
|
Florent Kermarrec
|
2e3e19e9d4
|
bench: simplify/improve, working on arty/genesys2.
|
2020-08-27 18:41:54 +02:00 |
|
Florent Kermarrec
|
5c69da5d6d
|
bench: add initial kcu105 bench target.
|
2020-08-24 21:56:11 +02:00 |
|
Florent Kermarrec
|
9995c0fefb
|
bench: switch integrated_rom to "rw" mode and reload it over Etherbone at startup.
This simplifies software development.
|
2020-08-24 18:40:54 +02:00 |
|
Florent Kermarrec
|
ac825e5112
|
add SPDX License identifier to header and specify file is part of LiteDRAM.
|
2020-08-23 15:52:08 +02:00 |
|
Florent Kermarrec
|
94241d0583
|
bench: use new platform.request_all on LedChaser.
|
2020-08-06 20:03:03 +02:00 |
|
Florent Kermarrec
|
74205979bd
|
bench: add genesys2 bench.
|
2020-08-06 19:19:45 +02:00 |
|