Commit Graph

1126 Commits

Author SHA1 Message Date
Charles-Henri Mousset f5dfdf9abf
[enh] added doc about JTAG and ext. board 2023-04-29 19:39:51 +02:00
Charles-Henri Mousset 322cc5d45b
[init] added colorlight i9+ based on XC7A50 FPGA 2023-04-29 18:36:35 +02:00
Gabriel Somlo 1f6e7f36a5 target/stlv7325-v2: fix typo in eth phy delay 2023-04-28 16:56:37 -04:00
Gabriel Somlo 1185ff51f1 Initial support for STLV7325 (v2) Kintex-7 board.
This is the 2nd (2023) version of the board sold through
https://www.aliexpress.us/item/3256801088848039.html

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2023-04-28 10:24:21 -04:00
Lukas F. Hartmann a9e3e3c050 Merge branch 'master' of https://github.com/litex-hub/litex-boards 2023-04-25 20:29:11 +02:00
Lukas F. Hartmann 17a5d3c130 mnt_rkx7: add HDMI terminal, default USB to true 2023-04-25 20:27:29 +02:00
offNaria 68bfb325a5
Fix Memory test failure of Alveo U250 2023-04-24 17:35:58 +09:00
Do Viet Thanh 340da5393c Fix Memory initialization of Alveo U200 failed #1606 2023-04-17 18:59:50 +07:00
Richard Tucker 2ed66317c7 efinix_xyloni_dev_kit: fix build error 2023-04-14 22:31:21 +10:00
Hans Baier c7077880b9 copyright notices on enclustra 2023-04-11 10:29:52 +07:00
Hans Baier ed947d1b55 enclustra: add baseboard ST1 2023-04-11 10:29:44 +07:00
enjoy-digital a8eb0b20c1
Merge pull request #491 from hansfbaier/stlv7325-hdmi
STL7325: Add Video, and connectors (FMC, BTB, 2.54mm)
2023-04-07 09:06:55 +02:00
Hans Baier 2f13decc49 stlv7325: make VCCIO configurable 2023-04-07 09:27:03 +07:00
Hans Baier 566a753dd3 stlv7325: S7PLL is enough 2023-04-07 08:45:06 +07:00
Hans Baier 7c99f0758d stlv7325: fix video args 2023-04-07 08:35:49 +07:00
Hans Baier 66cbd27bbf stlv7325: fix video PHY 2023-04-07 08:25:59 +07:00
Hans Baier 5067a2683f sitlinv_stlv7325: add video HDMI, enable compressed bitstream 2023-04-07 07:31:42 +07:00
Hans Baier 43ce24dcb3 add QMTech 5CEFA5 Cyclone V board support 2023-04-06 18:27:51 +07:00
enjoy-digital a4925d14f9
Merge pull request #488 from Icenowy/stlv7325-s7pll
sitlinv_stlv7325: use S7PLL instead of S7MMCM for system clock
2023-04-04 08:22:16 +02:00
Gabriel Somlo 1b9a74bf08 targets/nexys-video: simplify sata configuration
Make nexys-video SATA configuration similar to the way it is supported
on the majority of other SATA-capable targets.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2023-04-03 12:28:12 -04:00
Icenowy Zheng b1107e94d4 sitlinv_stlv7325: use S7PLL instead of S7MMCM for system clock
As we do not need fine phase tweaking for the main system clock, use
S7PLL instead of S7MMCM to allow higher VCO frequency and more flexible
sys_clk_freq.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-04-03 16:45:13 +08:00
Hans Baier 0125ae4271 Add support for QMTech Artix7 200T FBG484 board 2023-03-20 08:21:36 +07:00
Hans Baier 98ddb97f5e Support QMTech XC7A75T, XC7A100T core boards 2023-03-20 07:57:58 +07:00
Icenowy Zheng 6b8a5d35c0 sipeed_tang_nano_20k: support copackaged SDRAM
The copackaged SDRAM of GW2AR-18 QN88 package is 8MB size, 32bit DQ
width.

Add support for it.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-03-13 17:11:06 +08:00
Icenowy Zheng 291c43b898 sipeed_tang_nano_20k: new board
This board uses Gowin GW2AR series chip (which is GW2A with integrated
RAM).

Support for the integrated SDRAM on Tang Nano 20K is still TODO.

Note: currently when the SD card is enabled, block 0 could be correctly
read but block 1 will fail.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-03-13 16:45:25 +08:00
Florent Kermarrec bf4f688164 targets/pcie: Update Xilinx S7 constraints. 2023-03-06 12:20:34 +01:00
Florent Kermarrec c9a0f5f50b targets/sipeed_tang_primer_20: Ethernet/Etherbone working.
Test:
./sipeed_tang_primer_20k.py --cpu-type=serv --with-etherbone --build --load

ping 192.168.1.50
2023-03-02 12:02:58 +01:00
Florent Kermarrec 4a724d9d2d targets/sipeed_tang_primer_20k/hdmi: Remove pn_swap on data lines that is no longer required. 2023-03-02 11:44:14 +01:00
Florent Kermarrec 9e73ba53ea platforms/sipeed_tang_primer_20k: Update hdmi pins to official dock version and fix compilation.
Test:
./sipeed_tang_primer_20k.py --cpu-type=serv --with-video-terminal --build --load

Working.
2023-03-02 11:39:41 +01:00
Florent Kermarrec 8a6f0bd94f opalkelly_xem8320: Review and update to recent LiteX changes. 2023-03-01 09:16:51 +01:00
AEW2015 e20391d366 Basic SoC for Opal Kelly XEM8320 2023-02-28 13:19:12 -07:00
Florent Kermarrec f400179b5b targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
Florent Kermarrec 2eb7419678 targets/machdyne: Switch to LiteXModule for consistency with other targets. 2023-02-23 09:07:06 +01:00
inc 33cfe59614 add pullups for kopflos ethernet 2023-02-22 08:00:58 +01:00
inc bd20b31a5c add support for machdyne kopflos board 2023-02-21 11:18:22 +01:00
Michael Welling b1df2c0f85 Add initial support for the ICE-V wireless
Signed-off-by: Michael Welling <mwelling@ieee.org>
2023-02-19 00:00:07 -06:00
Florent Kermarrec 7b716e4899 antmicro_sdi_mipi_video_converter: Cleanup/Update to new LiteX conventions. 2023-02-16 09:02:14 +01:00
enjoy-digital fe2be83feb
Merge pull request #473 from antmicro/crosslink-nx-zephyr
Add support for SDI-MIPI Video Converter
2023-02-16 08:49:04 +01:00
Florent Kermarrec 857166e455 xilinx_alveo_u200: Add missing copyrights. 2023-02-16 08:45:34 +01:00
enjoy-digital adf8b8c5df
Merge pull request #472 from vietthanh85/xilinx_alveo_u200
Add support for Xilinx Alveo U200
2023-02-16 08:42:21 +01:00
Antoni Pokusinski 70f2fd6368 Fix format 2023-02-15 12:37:33 +01:00
Antoni Pokusinski 01abbc0d50 Replace deprecated register_mem with add_slave 2023-02-15 12:37:33 +01:00
Antoni Pokusinski 934e031dca Fix imports 2023-02-15 12:37:33 +01:00
Tomasz Michalak 223a69cf91 Add platform and target files for Antmicro's sdi mipi video converter board
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2023-02-15 12:37:33 +01:00
Florent Kermarrec fdffeb8474 radiona_ulx4m_ld_v2: Do a first review/cleanup path. 2023-02-13 16:11:32 +01:00
Goran Mahovlic 8c9ea15d0a
Update radiona_ulx4m_ld_v2.py 2023-02-13 12:08:38 +01:00
Goran Mahovlic 404fefaab1
changing filename to radiona 2023-02-13 12:06:04 +01:00
Goran Mahovlic f7822b7dc7
Adding target to files 2023-02-13 11:40:43 +01:00
Florent Kermarrec b8abdf1b39 targets/digilent_arty: Add arguments for XDAC and DNA.
Avoid specific checks for Vivado toolchain (Now handled by user for f4pga toolchain)
and fix linux-on-litex-vexriscv build.
2023-01-23 08:55:10 +01:00
Florent Kermarrec b9874685a5 gadgetfactory_papilio_pro: Cosmetic cleanups. 2023-01-17 15:43:12 +01:00
enjoy-digital ec4d203eb6
Merge pull request #471 from Acathla-fr/papilio
Target/Platform Papilio Pro added (with Arcade MegaWing)
2023-01-17 11:21:27 +01:00
enjoy-digital 801008f5ad
Merge pull request #469 from hansfbaier/hpcstore-rename
HPC FPGA Store on AliExpress renamed itself to SITLINV
2023-01-17 11:20:19 +01:00
Do Viet Thanh 3b36e576ba Add support for Xilinx Alveo U200 2023-01-17 06:44:21 +07:00
Fabien 05ef1ee09e Target/Platform Papilio Pro added (with Arcade MegaWing) 2023-01-16 13:41:24 +01:00
Hans Baier c0773ed9b9 HPC FPGA Store on AliExpress renamed itself to SITLINV 2023-01-16 11:31:35 +07:00
Florent Kermarrec 36a4100c8b ocp_timecard: Add DDR3 SDRAM support. 2023-01-13 12:41:34 +01:00
Florent Kermarrec 3ca298ba42 ocp_tap_timecard: Add TODO on SMAs. 2023-01-13 11:51:09 +01:00
Florent Kermarrec c753bf7fc1 ocp_tap_timecard: Fix GTPE2 location. 2023-01-13 11:47:52 +01:00
Florent Kermarrec 8b0d4787c7 ocp_tap_timecard: Fix CI. 2023-01-13 10:55:07 +01:00
Florent Kermarrec 1e35d78512 ocp_tap_timecard: Add initial SMAIOs peripherals to allow using SMA over PCIe DMA or also with direct (and slow) control/visualization with CSR registers. 2023-01-13 10:08:44 +01:00
Florent Kermarrec a0fd3e7536 Add initial OCP-TAP TimeCard support with PCIe/SPIFlash/Leds/Buttons/DNA/XADC (Compiles but untested). 2023-01-12 18:50:23 +01:00
Luc Lagarde 7a911b8ff6
Allow building digilent_arty using f4pga
Only use XADC() and DNA() functions if vivado is the current toolchain.
2023-01-06 16:09:56 -06:00
gatecat 764f64ff1e nx_vip: Add missing 'origin' to SRAM SocRegions
Signed-off-by: gatecat <gatecat@ds0.me>
2023-01-04 12:02:11 +01:00
Florent Kermarrec f5643e7c78 machdyne: Fix LiteDRAM PHYs imports (QuarterRateGENSDRPHY not already working?/integrated). 2023-01-01 21:35:51 +01:00
enjoy-digital 563ccbd8cf
Merge pull request #464 from machdyne/master
initial support for machdyne konfekt and noir
2023-01-01 16:12:51 +01:00
inc fec82c59e2 remove konfekt ethernet option 2022-12-30 17:36:52 +01:00
inc f0dc9a6874 initial support for machdyne konfekt and noir 2022-12-30 17:00:35 +01:00
stone3311 6cfb56bb07 terasic_deca: add SPI SD card support 2022-12-28 02:13:06 +01:00
Gwenhael Goavec-Merou 4e06e5ff9c targets/xilinx_zybo_z7: adding missing variant parameter to the platform 2022-12-14 07:47:09 +01:00
JoyBed d28894a4b3
Reintroduce original Zybo + HDMI addition (#461)
* Reintroduce original Zybo support

* Reintroduce original zybo, add HDMI + fixes for Z7
2022-12-12 22:05:47 +01:00
Florent Kermarrec 12db52471d targets/jungle_electronics_fireant: Update SPIFlash (Make it similar to other boards with BIOS in SPIFlash). 2022-12-08 08:37:13 +01:00
enjoy-digital c05ce32c8a
Merge pull request #458 from trabucayre/arty_s7_tcl_config
Arty z7 tcl config
2022-12-08 08:31:22 +01:00
Tim Callahan 6e205be83b Add LedChaser to iCEBreaker-bitsy.
Signed-off-by: Tim Callahan <tcal@google.com>
2022-12-04 17:58:20 -08:00
Gwenhael Goavec-Merou a889321535 targets/digilent_arty_z7: adding note to load gateware and bios 2022-12-03 16:54:52 +01:00
Gwenhael Goavec-Merou e71e3ab3ec platforms,targets/digilent_arty_z7: use a dict for PS config instead of fetching file configuration 2022-12-03 16:54:39 +01:00
Gwenhael Goavec-Merou b030630237
Merge pull request #453 from cklarhorst/zybo
Zybo: Fix for Zynq7000 and use ps7 as submodule for Soft-CPUs
2022-11-25 21:48:43 +01:00
mkuhn99 53b6bf035a fixed parser 2022-11-24 16:03:12 +01:00
mkuhn99 926ed21f0b fixed review remarks; added zynq7000 as a submodule for using the ps as a slave 2022-11-23 17:20:25 +01:00
mkuhn99 c489347a51 fixed zynq7000 integration; introduced option to add the processing-system as slave to the SoC 2022-11-18 11:19:57 +01:00
Icenowy Zheng 892bf3546d isx_im1283: connect CRG reset to PLL
This fixes soft reset.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-16 15:12:18 +08:00
Icenowy Zheng e27d8c958e isx_im1283: add jtagbone support
Add necessary script snippets for enabling jtagbone in the command line.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-15 21:07:10 +08:00
Florent Kermarrec ae47172d2a targets/decklink_mini_4k: Update clock constraints. 2022-11-14 10:21:42 +01:00
Icenowy Zheng e9d7013d70 sitlinv_stlv7325: add jtagbone support
Add necessary script snippets for enabling jtagbone in the command line.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-13 17:28:04 +08:00
Icenowy Zheng c2c59f5e8c sitlinv_stlv7325: allow to set local/remote ip
Port the script snippet from Colorlight i5 for setting the local/remote
IP address to STLV7325.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-13 17:27:58 +08:00
Icenowy Zheng 27c3afb8fb sitlinv_stlv7325: allow dynamic Ethernet IP
Currently the sitlinv_stlv7325 target script parses the option that
selects dynamic Ethernet IP; however it's not really passed to LiteETH.

Really pass this option and add an assert that does not allow dynamic
Etherbone IP like other boards.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-13 17:27:23 +08:00
Icenowy Zheng 1c07fa94ca sitlinv_stlv7325: fix ident string vendor name
As we changed the vendor name to proper Sitlinv in the file name, the
ident string is left untouched.

Fix this too.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-13 17:27:23 +08:00
Florent Kermarrec 58489ebebf targets/BaseSoC: Cleanup parameters. 2022-11-08 12:31:49 +01:00
Florent Kermarrec a8c92cd86f targets/simple: Switch back to old version for now. 2022-11-08 11:55:06 +01:00
Florent Kermarrec 9e7079c4c8 targets: Remove int() on BaseSoC's sys_clk_freq. 2022-11-08 11:54:17 +01:00
Florent Kermarrec b0e6414519 targets: Cleanup arguments and switch --sys-clk-freq to float (avoid conversion in code). 2022-11-08 10:41:35 +01:00
Florent Kermarrec 16b9677acd targets: Switch to soc_core_argdict.
The next move was to remove soc_core and only keep soc; so this is probably the right time to do
it in targets to avoid having to handle it later.
2022-11-07 08:43:26 +01:00
Florent Kermarrec f1e24046fd xilinx_alveo_u250: Fix. 2022-11-06 22:17:28 +01:00
Florent Kermarrec 9a2028a9ba targets: Remove useless argparse imports. 2022-11-06 22:09:21 +01:00
Florent Kermarrec 30723b1bb0 targets: Update targets that were still using argparse.ArgumentParser. 2022-11-06 22:07:17 +01:00
Florent Kermarrec 33b0400aed targets: Update LiteXArgumentParser imports. 2022-11-06 21:39:52 +01:00
Gwenhael Goavec-Merou 9960f38d95 targets: replace LiteXSoCArgumentParser by LiteXArgumentParser, remove tasks done LiteXArgumentParser 2022-11-06 11:27:47 +01:00
Icenowy Zheng d7184fb043 stlv7325, a_e115fb: use the proper vendor name Sitlinv
The boards are in fact from a vendor called 成都赛特凌威科技有限公司,
and their English registered trademark (used on the banner of their
Taobao store) is Sitlinv, which sounds like 赛特凌威.

Use this vendor name instead of where it's bought.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-10-30 10:51:13 +08:00
enjoy-digital 4dc8f7223c
Merge pull request #443 from trabucayre/arty_z7_bios
targets/digilent_arty_z7: adding software support
2022-10-28 10:42:35 +02:00
Florent Kermarrec 3e809c3a1e targets: Fix some LiteXModule imports. 2022-10-28 10:35:57 +02:00
Florent Kermarrec ab3ed624cc fpgawars_alhambra2: +x. 2022-10-28 10:31:49 +02:00