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399 commits

Author SHA1 Message Date
Florent Kermarrec
6a5f2f59a6 targets/orangecrab: use new ECP5DDRPHY's cmd_delay to add extra delay on DDR3's Clock/Commands. 
This fixes https://github.com/enjoy-digital/litedram/issues/130 and has been tested
at 48/64/96MHz on MT41K64M16 and MT41K512M16 variants.

Also remove un-needed cd_sys2x_eb.
 2021-01-12 18:57:22 +01:00
Florent Kermarrec
9ff90eb9fe targets/c10lprefkit: fix default sys-clk-freq. 2021-01-12 16:15:52 +01:00
Florent Kermarrec
0a7443d273 targets/orangecrab: make usr_btn optional to fix compilation with revision 0.1. 2021-01-08 19:30:37 +01:00
Florent Kermarrec
ae5494d7b6 orangecrab: defaults to USB-ACM UART. 2021-01-08 19:01:41 +01:00
Florent Kermarrec
c6e75122d9 sds1104xe: defaults to Crossover UART. 2021-01-08 19:00:41 +01:00
Florent Kermarrec
ab72f69937 targets/ac701: rename --ethernet-phy to --eth-phy for consistency with others targets. 2021-01-08 18:50:01 +01:00
Hans Baier
0ee62dd681 add etherbone ip address option for relevant boards 2021-01-08 18:44:31 +01:00
Florent Kermarrec
869cce2bba targets/colorlight_5a_75x: rename etherbone-ip args to eth-ip. 
eth-ip will also be used to configure Ethernet IP addresss.
 2021-01-07 09:26:38 +01:00
Florent Kermarrec
c829a47c31 targets/colorlight_5a_75x: Automatically disable Led Chaser when serial is used. 2021-01-07 09:17:28 +01:00
enjoy-digital
adbcc81ecf
Merge pull request #145 from hansfbaier/master 
colorlight: Add option for etherbone ip address and LED chaser
 2021-01-07 09:08:43 +01:00
enjoy-digital
a6e867c691
Merge pull request #144 from gsomlo/gls-genesys2-sdcard 
genesys2: LiteSDCard support
 2021-01-07 08:12:24 +01:00
Florent Kermarrec
d73bd2f7ce targets/xilinx: add comment on sys_clk to pll.clkin false path. 2021-01-07 08:01:54 +01:00
Florent Kermarrec
1ac1c6857f targets/xilinx: add false path constraint between sys_clk and pll.clkin. 
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
 2021-01-07 00:02:46 +01:00
Hans Baier
0d69cfa6b0 colorlight: make LEDs optional 2021-01-05 08:03:26 +07:00
Hans Baier
4bec17e1a7 colorlight: Add option for etherbone ip address 2021-01-05 07:49:44 +07:00
Gabriel Somlo
2589d9f704 genesys2: add (spi-)sdcard build options 
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2021-01-04 13:57:21 -05:00
Florent Kermarrec
fe67766fb7 targets/gensdrphy/halfsdrphy: pass new optional sys_clk_freq (used to compute cl). 2021-01-04 11:38:07 +01:00
Florent Kermarrec
0e3c03f2f6 mercury_xu5: remove unneeded cmd_latency=0 (now defaulting to 0). 2021-01-04 10:48:34 +01:00
Florent Kermarrec
5cc49bafbd orangecrab: Run reset_timer with por/48MHz clock domain (sys clock domain is now directly reseted on usr_btn press). 2021-01-04 09:42:05 +01:00
Florent Kermarrec
1fb24d4c71 orangecrab: Avoid usb clock domain reset on usr_btn press or SoC reset. 
Allows the USB-ACM link to stay up during reset.
 2021-01-04 09:05:19 +01:00
Florent Kermarrec
06cb49af37 targets/arty: add variant support through --variant args. 
./arty.py --variant=a7-35 or a7-100
./arty_s7.py --variant=s7-50 or s7-25
 2020-12-29 18:43:14 +01:00
Florent Kermarrec
02a81d54e2 targets/ecpix5/eth: set rx_delay to 0ns (tested with netboot on R01). 2020-12-29 16:01:12 +01:00
Florent Kermarrec
84098d2de5 targets/qmtech_wukong: submitted target was the platform file, update with target shared in #133. 
Build tested with /qmtech_wukong.py --with-sdcard --with-ethernet --integrated-rom-size=0x10000 --build.
 2020-12-29 14:13:11 +01:00
Florent Kermarrec
e380f24655 targets/qmtech_wukong: +x. 2020-12-29 13:24:41 +01:00
Shinken Sanada
4b721eded7 add QmTech Wukong board support. 2020-12-29 13:20:42 +01:00
Florent Kermarrec
9beaf25822 nexys4ddr: fix eth/int_n pin (B8) and use 4-bit on vga.blue. 2020-12-24 10:15:29 +01:00
Sahaj Sarup
2a04c5c74e nexys4ddr: add support for litexvideo VGA Terminal 
This commit adds VGA support for the Nexys A7/ Nexys 4 DDR.

The VGA is however limited to RGB443 instead of the full 12bit RGB444.
This is because IO D8 which is MSB for Blue, is also used for ETH int_n.
This makes the final output have a yellow tint.
 2020-12-23 02:24:18 +05:30
Vadim Kaushan
f6a106cdf4
Fix orangecrab target 2020-12-20 01:07:43 +03:00
Florent Kermarrec
00fc2c5166 targets/orangecrab: use new DM remapping capability of LiteDRAM to fix LDM/UDM. 
Required by VexRiscv-SMP that uses DMs on LiteDRAM interface.
 2020-12-16 11:52:58 +01:00
Vadim Kaushan
bb58258fd4
Fix de10nano target 2020-12-14 15:27:33 +03:00
Florent Kermarrec
519f9449fa targets/sds1104: litex_term now directly supports crossover uart. 2020-12-10 13:56:01 +01:00
Robert Winkler
18337cdf25 targets/arty: sync with litex repository 
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
 2020-12-07 17:32:40 +01:00
Geert Uytterhoeven
8e5f955e4e targets/orangecrab: Fix --sdram-device help text 
Obviously --sdram-device takes the SDRAM device, not the ECP5 FPGA
device.

Fixes: bf3c9dc9bf ("orangecrab: Add sdram selection option")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
 2020-12-04 14:34:01 +01:00
Florent Kermarrec
fe563baec7 targets/fomu: modification to ValentyUSB no longer required. 
Following commits make it generic/portable while still using IOBuffers:
77b9d01058
371526e432
 2020-11-27 19:40:45 +01:00
Florent Kermarrec
5a4e28d47d target/usb_acm: switch git clone to litex-hub/valentyusb repo (up to date with LiteX). 2020-11-27 18:53:45 +01:00
Gwenhael Goavec-Merou
8d1095224f add support for redpitaya14/16 2020-11-26 06:54:11 +01:00
David Shah
11fa5c34ac nexus: Allow selection of toolchain 
Signed-off-by: David Shah <dave@ds0.me>
 2020-11-25 09:45:25 +00:00
Florent Kermarrec
159a0c751c targets/colorlight_5a_75x: update instructions and LiteEthPHYRGMII's tx_delay (required with LiteEth fixes). 2020-11-23 12:30:36 +01:00
Florent Kermarrec
03bb929f27 colorlight_5a_75x: add LedChaser. 2020-11-23 10:14:20 +01:00
Jędrzej Boczar
ce38cff41d mercury_xu5: reduce cmd_latency to fix problems with DRAM leveling 2020-11-20 15:31:47 +01:00
enjoy-digital
a2f3add24e
Merge pull request #123 from teknoman117/litefury 
Support for the RHS Research LiteFury
 2020-11-20 08:44:27 +01:00
Nathaniel R. Lewis
389b623fe2 targets/litefury: new target 
LiteFury is an Artix-7 development board in the M.2 form factor
for PCIe accelerator development. It's similar to the Aller but
with an xc7a100t rather than an xc7a200t and no TPM module.

https://rhsresearch.com/collections/rhs-public/products/litefury
 2020-11-19 21:52:14 -08:00
Florent Kermarrec
49e1c34dfd targets/acorn_cle_215: add SATA. 2020-11-18 19:14:18 +01:00
Florent Kermarrec
778ce53865 targets/xcu1525: add SATA. 2020-11-17 15:27:42 +01:00
Florent Kermarrec
27e19644f4 targets/kcu105: add SATA. 2020-11-16 18:44:18 +01:00
Florent Kermarrec
27f60b2e93 add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated). 
Pinout from https://github.com/360nosc0pe project.
 2020-11-13 12:20:15 +01:00
Florent Kermarrec
d42af3ea19 targets: add --sys-clk-freq support to all targets. 2020-11-12 18:07:28 +01:00
Florent Kermarrec
72afb95329 targets: create platform on BaseSoC for all targets (consitency). 2020-11-12 16:57:31 +01:00
Florent Kermarrec
843e724e3d targets/pcie: simplify using new LiteX's add_pcie method and enable it on all devices supported by LitePCIe. 2020-11-12 16:39:42 +01:00
Florent Kermarrec
9f11bfb0d1 qmtech_ep4ce15: convert name to lowercase, minor cleanup and add to test_targets. 2020-11-12 14:33:45 +01:00
enjoy-digital
31eb74dc2d
Merge pull request #122 from baselsayeh/master 
add Qmtech EP4CE15 coreboard support
 2020-11-12 14:27:49 +01:00
Florent Kermarrec
f3ccd140c2 targets/simple: add try/except on leds. 2020-11-12 14:26:00 +01:00
Basel Sayeh
0fc67ddfdb
update copyright 2020-11-12 15:25:39 +02:00
Florent Kermarrec
7c6df67739 targets: add tinyfpga_bx target (based on icebreaker/fomu targets). 2020-11-12 14:09:25 +01:00
Florent Kermarrec
302e4ffdff targets/simple: simplify (only keep minimal SoC + Leds) and add load argument. 
ex of use:
./simple.py litex_boards.platform.ulx3s --build --load
./simple.py litex_boards.platform.trellisboard --build --load
./simple.py litex_boards.platform.arty --build --load
etc...
 2020-11-12 13:54:30 +01:00
Florent Kermarrec
5cf7731f37 targets/netv2: add PCIe. 2020-11-12 12:16:01 +01:00
Florent Kermarrec
7a9f175450 targets/pcie: remove force of csr_data_width to 32 (this is now the default) but just add a check on the pcie block. 2020-11-12 12:08:20 +01:00
Florent Kermarrec
4401fec1e6 targets: remove add_csr("crg") (no longer needed). 2020-11-12 11:54:11 +01:00
Florent Kermarrec
bd4e92ad13 targets: cleanup, uniformize build arguments between targets. 2020-11-12 11:46:00 +01:00
Basel Sayeh
1b1ed5ebf1
add Qmtech EP4CE15 coreboard support 2020-11-12 01:56:36 +02:00
Florent Kermarrec
5fbb176c2a targets/crosslink_nx: update NXLRAM import. 2020-11-09 11:05:18 +01:00
Florent Kermarrec
afe44e2bd6 targets/crosslink_nx_evn: update NXPLL import. 2020-11-09 10:25:30 +01:00
Florent Kermarrec
39d979a9d3 targets/Ultrascale: add missing AsyncResetSynchronizer import. 2020-11-09 10:25:05 +01:00
davidcorrigan714
97b64d16a6 Lattice NX PLL Support 2020-11-08 20:34:46 -06:00
Florent Kermarrec
2b17dc1b89 target: add rst signal to CRG to allow full reset of the SoC on reboot command. 2020-11-04 11:13:42 +01:00
Florent Kermarrec
aa6b9cab4a targets/crosslink_nx_vip: +x. 2020-11-04 09:30:57 +01:00
Florent Kermarrec
ce14775dfb targets/tec0117: move SerialFlashManager import to flash function. 2020-11-04 09:30:31 +01:00
Florent Kermarrec
c093d0d0fc platforms: cleanup pass to uniformize comments/separators/orders. 2020-11-03 10:48:57 +01:00
Florent Kermarrec
8d26c241cd kc705: revert sys_clk_freq to 125MHz. 2020-11-02 19:51:48 +01:00
Florent Kermarrec
babf638c2b targets/nexys_video: add SATA support. 2020-11-02 19:43:25 +01:00
Florent Kermarrec
e950a4a588 targets/kc705: update sata pads. 2020-10-30 17:12:59 +01:00
Florent Kermarrec
a410e447e1 targets/kc705/sata: enable write support. 2020-10-30 14:51:40 +01:00
Florent Kermarrec
f9252fdd45 targets/kc705: simplify SATA using LiteX's add_sata integration method. 2020-10-29 10:16:40 +01:00
Florent Kermarrec
7da8628fba targets/kc705: switch SATA to gen2. 2020-10-28 19:09:30 +01:00
Florent Kermarrec
931f6667ac targets/kc705: add initial SATA support. 2020-10-26 15:15:24 +01:00
enjoy-digital
51934567fe
Merge pull request #118 from daveshah1/lifcl-vip 
Add CrossLink-NX VIP board platform and target
 2020-10-22 11:03:47 +02:00
Florent Kermarrec
a38c1e7062 mist: add copyrights. 2020-10-22 10:48:58 +02:00
David Shah
20720693c4 crosslink_nx_vip: Add HyperRAM support 
Signed-off-by: David Shah <dave@ds0.me>
 2020-10-22 09:15:40 +01:00
David Shah
b278d8bccc Add CrossLink-NX VIP board platform and target 2020-10-22 09:15:35 +01:00
YanekJ
4541c39e94 Initial support for the MIST board (https://github.com/mist-devel/mist-board/wiki) 2020-10-17 12:28:22 +02:00
Florent Kermarrec
814e7630e4 targets/xilinx: use generic name for idelay clk (avoid clk200, clk400, etc...) since we somtimes want to change it. 2020-10-13 12:10:29 +02:00
Florent Kermarrec
06137452d2 targets/xcu1525: use ddram_channel to select clk300. 2020-10-13 11:57:00 +02:00
Florent Kermarrec
c3ea04b6e9 targets/s7/us: update sdram (manual cmd_latency no longer needed). 2020-10-12 18:46:21 +02:00
Florent Kermarrec
ddf7038c78 ulx3s: add 1.7 and 2.0 revisions support. 2020-10-12 13:23:26 +02:00
Konrad Beckmann
5e67853a21 versa_ecp5: Add --eth-phy to select ethernet phy 
This also simplifies the logic a bit.
 2020-10-09 23:56:16 +02:00
Konrad Beckmann
477734ff06 versa_ecp5: Add etherbone support 
Etherbone can be enabled with --with-etherbone
 2020-10-09 00:53:08 +02:00
Florent Kermarrec
fff20f7532 targets/fomu: base it on iCEBreaker target + USB-ACM. 
This uniformizes Fomu target with others, provide a simple example of LiteX SoC
on Fomu and will ease maintenance.
 2020-10-06 11:39:30 +02:00
enjoy-digital
79ef091a06
Merge pull request #110 from pepijndevos/gowin 
Add initial support for Trenz TEC0117 board
 2020-10-05 19:50:09 +02:00
enjoy-digital
062fbd6c63
Merge pull request #108 from daveshah1/dave/nx-evn-doc 
crosslink_nx_evn: Improve documentation on UART jumpers
 2020-10-02 09:40:04 +02:00
Pepijn de Vos
18e5def9f2 don't verify erase, very slow 2020-10-01 08:41:16 +02:00
Pepijn de Vos
81e4f1f158 add initial support for Trenz TEC0117 board 2020-09-30 14:01:36 +02:00
Florent Kermarrec
de09b10726 targets/xcu1525: add ddram-channel selection and rewrite DRC workaround comment. 2020-09-24 18:19:49 +02:00
Florent Kermarrec
cc53206aff targets/kcu105: create specific cd_eth for ethphy. 2020-09-24 10:25:55 +02:00
Florent Kermarrec
5b7288cfee targets/kcu105: add Etherbone support. 2020-09-24 09:55:11 +02:00
Florent Kermarrec
77ba49f2bb targets/pcie: update timing_constraints (now provided by the .xci). 2020-09-24 09:50:55 +02:00
Florent Kermarrec
e4cdbe0f7a targets/ac701: reduce ddram pads to the first 4 modules. 2020-09-05 11:46:07 +02:00
David Shah
8a9fd02768 crosslink_nx_evn: Improve documentation on UART jumpers 
Signed-off-by: David Shah <dave@ds0.me>
 2020-09-05 09:58:28 +01:00
Florent Kermarrec
76ac4a69a8 rename forest_kitten_33 platform/target to fk33. 2020-09-04 20:05:18 +02:00
Florent Kermarrec
979fee7517 forest_kitten_33: add pcie. 2020-09-04 20:02:43 +02:00
Florent Kermarrec
ad48728160 xcu1525: update headers (were still using old format). 2020-09-04 19:59:09 +02:00
enjoy-digital
ad4c483c32
Merge pull request #106 from daveshah1/dave/alveo_u250_pcie 
alveo_u250: Add PCIe x4 support
 2020-09-04 19:22:48 +02:00
enjoy-digital
a68c00e48e
Merge pull request #104 from DerFetzer/colorlight_5a_75e_v6_0 
Add support for 5A-75E V6.0 board
 2020-09-04 19:21:02 +02:00
David Shah
ae6a052e57 alveo_u250: Add PCIe x4 support 
Based on the implementation in xcu1525

Signed-off-by: David Shah <dave@ds0.me>
 2020-09-04 14:20:04 +01:00
Florent Kermarrec
2eda9d0252 xcu1525: add DDR4 IOs for C1/C2/C3 and fix compilation (untested). 2020-09-04 11:34:33 +02:00
Florent Kermarrec
7b6b71d4e3 xcu1525: add initial DDR4 support in C0 (untested). 2020-09-03 19:48:23 +02:00
Florent Kermarrec
5a62a07b45 xcu1525: add initial PCIe support (untested). 2020-09-03 19:26:02 +02:00
Florent Kermarrec
51e881d1ff add minimal xcu1525 support (VCU1525 or BCU1525 boards). 2020-09-03 19:06:43 +02:00
DerFetzer
8bd736bd77 targets/colorlight_5a_75x: make Ethernet PHY selectable, cast sys_clk_freq to int for Wishbone 2020-09-02 22:08:45 +02:00
DerFetzer
24b853c2db targets/colorlight_5a_75x: force use of internal oscillator when using Ethernet with 5A-75E V6.0 2020-09-01 17:07:52 +02:00
DerFetzer
8b1fee0e66 Add support for 5A-75E V6.0 board 2020-09-01 17:02:17 +02:00
Florent Kermarrec
9b6ed6bdf1 targets/orangecrab: add fallback to bootloader when usr_btn is pressed for 1 second. 2020-09-01 16:22:32 +02:00
Florent Kermarrec
b9ac72cf78 targets: simplify clocking on iCE40/ECP5 targets (AsyncResetSynchronizer now integrated in PLL). 2020-09-01 13:38:32 +02:00
Florent Kermarrec
9e2d301745 targets/icebreaker: simplify, update PLL/API and BIOS execution from SPI Flash. 2020-09-01 12:58:13 +02:00
Florent Kermarrec
beccecf59f orangecrab: reduce DDR3 power consumption/heat and get back USB PLL to CRGSDRAM. 
- disable DQ termination.
- disable RTT_NOM.
- drive VCCIO/GND pads.

Reduce current from 0.25A to 0.12A with: ./orangecrab.py --uart-name=usb_acm --sys-clk-freq=48e6.
Still working at 96MHz, 0.17A with: ./orangecrab.py --uart-name=usb_acm --sys-clk-freq=96e6.

See https://github.com/enjoy-digital/litedram/issues/216.
 2020-08-28 20:01:54 +02:00
Florent Kermarrec
63b65e278c crosslink_nx_evn: update copyrights. 2020-08-24 22:33:58 +02:00
Florent Kermarrec
153326fa26 targets/icebreaker: update flash. 2020-08-24 17:19:15 +02:00
Piense
795e34aafd add initial Crosslink-NX support. 2020-08-24 16:47:38 +02:00
Florent Kermarrec
84c19a6cdf targets/de0nano: set sys2x_ps phase to 180° for sdram_rate=1:2. 2020-08-24 09:28:51 +02:00
Florent Kermarrec
70594a5305 ulx3s: simplify sdram constraints and increase phase to 180 for sdram_rate=1:2. 2020-08-24 09:05:58 +02:00
Florent Kermarrec
1781be166a general: add SPDX License identifier to header and specify files are part of LiteX-Boards. 2020-08-23 15:00:17 +02:00
connorwk
f328909578 Moved platform call inside of BaseSoC init for compatibility with linux-on-litex-vexriscv support. Added optional spi-sdcard support over P2 header. 2020-08-09 16:27:41 -04:00
Florent Kermarrec
45bb329b56 targets/colorlight_5a_75x: enable HalfRate SDRAM PHY. 2020-08-07 19:26:12 +02:00
Florent Kermarrec
b6a1ad5a9c targets/orangecrab: add simple CRG when built without DDR3. 2020-08-07 18:10:03 +02:00
Florent Kermarrec
869ceadacb targets: use platform.request_all on LedChaser. 2020-08-06 20:04:03 +02:00
Florent Kermarrec
ee28d7b5ec targets/ulx3s/add_oled: simplify. 2020-08-04 12:31:15 +02:00
Pepijn de Vos
eba70377b7 add optional OLED peripheral to ULX3S target 2020-08-04 11:07:30 +02:00
Florent Kermarrec
5fd3e8dbcd ecpix5: add SDCard. 
Validated with Linux-on-LiteX-VexRiscv.
 2020-07-28 17:45:49 +02:00
Florent Kermarrec
94ccf1dd3e targets/trellisboard: simplify clocking when no DDR3, remove firmware_ram (was here for debug). 2020-07-27 16:31:46 +02:00
Florent Kermarrec
eb8a484032 targets/de10nano: fix typo. 2020-07-26 12:01:11 +02:00
Florent Kermarrec
2cef54a909 targets/colorlight_5a_75x: avoid sys_clk_freq of 125MHz with etherbone (no longer required). 
This allows creating SoCs with CPU, SDRAM and Etherbone enabled all together.
 2020-07-26 11:58:42 +02:00
Florent Kermarrec
760b8ff93a arty: improve xy_pmod_io genericity (allow selecting the PMOD) and enable SDCard. 2020-07-24 16:29:35 +02:00
Florent Kermarrec
04fc98f834 de0nano/ulx3s: add sdram HalfRate support (untested). 2020-07-24 16:12:46 +02:00
Florent Kermarrec
d0ca1befa6 targets/de10nano/minispartan6: simplify HalfRate support, rename argument to sdram_rate. 2020-07-24 16:11:57 +02:00
enjoy-digital
89c5bf43cf
Merge pull request #92 from rob-ng15/master 
Enable use of HalfRateGENSDRPHY on de10nano
 2020-07-24 08:49:09 +02:00
Florent Kermarrec
1e1589a514 zybo_z7: demonstrate use of PS7 (with --cpu-type=zynq7000). 
This uses a pre-generated .xci hosted on github, still need to figure out where the best location for it.
 2020-07-23 17:45:21 +02:00
rob-ng15
7cda143250
Allow use of HalfRateGENSDRPHY 2020-07-23 14:41:35 +01:00
Florent Kermarrec
8a3b453e2f add Zybo Z7 minimal platform/targets: no PS7 support and USB-UART PMOD on JB. 2020-07-23 15:26:22 +02:00
Florent Kermarrec
19d0b95867 platforms/targets: keep in sync with litex. 2020-07-22 08:53:49 +02:00
Jędrzej Boczar
02f53e6326 targets/minispartan6: add support for HalfRateGENSDRPHY 2020-07-14 11:01:09 +02:00
Florent Kermarrec
d9595a317e targets/orangecrab: use user_btn as rst_n. 2020-07-06 17:49:05 +02:00
Florent Kermarrec
7b1bf9d74a targets: remove sdcard specific clock domain (now generated by the PHY). 2020-07-03 20:09:30 +02:00
Florent Kermarrec
31e6997e70 sdcard: rename cd_sdcard to cd_sd to avoid unnecessary clock domain. 2020-07-01 12:58:48 +02:00
Florent Kermarrec
fe3ea805bc targets/pcie: make pcie optional (--with-pcie) and avoid forcing uart to crossover. 2020-06-30 18:44:00 +02:00
Florent Kermarrec
7a48a61605 targets: add indentifier on all targets. 2020-06-30 18:11:04 +02:00
Florent Kermarrec
fc22e28fe9 targets: replace PCIeSoC with BaseSoC. 2020-06-30 17:41:57 +02:00
Florent Kermarrec
d28a0c4258 targets/pcie: remove DNA/XADC/ICAP that were only on PCIe targets. 
DNA/XADC/ICAP are demonstrated in LitePCIe repository and should probably be added with
a add_xy method.
 2020-06-30 17:37:24 +02:00
Florent Kermarrec
e91a5d6b82 targets/pcie: remove soft reset. 2020-06-30 17:28:13 +02:00
Florent Kermarrec
1356ebb416 targets/ecp5: update clocking on boards with DDR3 to use reset from ddrphy.init and use primary clock for Power on reset. 2020-06-29 16:42:53 +02:00
enjoy-digital
49973990f3
Merge pull request #85 from oskirby/logicbone 
Add Logicbone ECP5 board
 2020-06-29 16:24:15 +02:00
Owen Kirby
76a32ba8ec Add Logicbone ECP5 board 
The Logicbone is an Open Source development board for the Lattice ECP5
being developed at https://github.com/oskirby/logicbone
 2020-06-27 03:32:47 -07:00