70fb3de96c
targets: All boards based on Zynq7000: remove csr definition and GP0 connection to the SoC: now handled by zynq700 core CPU
2024-06-19 07:59:24 +02:00
efd6c8b0aa
targets/alinx_axu2cga,xilinx_zcu216,xilinx_kv260: remove csr definition and GP0 connection to the SoC: now handled by znqmp core CPU
2024-06-19 07:54:50 +02:00
07881259a5
litex_acorn_baseboard_mini: Assert cleanups.
2024-06-18 17:41:01 +02:00
6857418deb
litex_acorn_baseboard_mini: Allow simultaneous pcie and ethernet.
2024-06-18 13:56:08 +02:00
805a520b5a
litex_acorn_baseboard_mini: Fix and test PCIe Gen2 X1 with it.
2024-06-18 09:14:08 +02:00
27b99d4169
targets/lambdaconcept_ecpix5.py: allows configuring eth_ip/remote_ip/dynamic
2024-06-14 15:58:25 +02:00
635e932084
targets/lambdaconcept_ecpix5.py: added argument to select version (r02 by default)
2024-06-14 15:57:11 +02:00
6e6246d718
platforms/lambdaconcept_ecpix5.py: create_programmer: added option to select between r03 version (FT4232) and provious (FT2232)
2024-06-14 15:46:36 +02:00
1b22061e93
litex_acorn_baseboard_mini: Add PCIe support (Not yet buildable with Ethernet or SATA due to GTPE2_COMMON sharing).
2024-06-13 17:46:16 +02:00
eebe983914
platforms/sqrl_acorn: Add PCIe X1 pins when mounted in baseboard.
2024-06-13 17:23:26 +02:00
2cd89cdd16
efinix_trion_t20: add sdram
...
add sdram of the efinix trion t20 bga256 dev kit.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-06-13 12:16:09 +02:00
ed6ff8f4fe
targets: Switch to LiteX byte size definitions.
2024-06-13 10:04:19 +02:00
1013a53240
Merge pull request #587 from akioolin/master
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Add HSEDA XC7A35T board support
2024-06-11 18:50:06 +02:00
8bb3caee5f
targets/quicklogic_quickfeather: updated qlal4s3b_cell_macro Clock and Reset signals (similar fix to #1797 )
2024-05-30 08:37:14 +02:00
3c181106b8
Add HSEDA XC7A35T board support
...
Add HSEDA XC7A35T board support
2024-05-21 21:00:27 +08:00
b8d2b513a3
platforms/xilinx_zcu102.py: added PMOD0/1 (j55/j87)
2024-05-21 11:24:22 +02:00
11956b1709
platforms/xilinx_zcu106.py: added connectors and FMC HPC0/1
2024-05-17 12:16:33 +02:00
c660a7a1af
Merge pull request #585 from hansfbaier/qmtech-fgg676-fix
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qmtech_artix7_fgg676.py: This board also has a 200T variant
2024-05-16 11:09:19 +02:00
f544fec11b
Merge pull request #584 from hansfbaier/alientex_davincipro
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alientek_davincipro: fix part number
2024-05-16 11:08:14 +02:00
0b1728ce2a
platform/xilinx_zcu102: fixed FMC HP0 pinout
2024-05-14 12:12:35 +02:00
7166ef5bba
qmtech_artix7_fgg676.py: This board also has a 200T variant, and all variants are speedgrade 2
2024-05-14 08:41:05 +07:00
19bce6630d
Add initial LimeSDR XTRX Platform support (Adapted from Fairwaves XTRX).
2024-04-26 16:00:40 +02:00
7a0ee7f5cf
platforms/fairwaves_xtrx: Change rst to rst_n (active low).
2024-04-26 15:50:28 +02:00
5a25a4e2b4
alinx_axau15p: Switch to OpenFPGALoader.
...
Requires: https://github.com/trabucayre/openFPGALoader/pull/452
2024-04-25 17:23:39 +02:00
f0c0005126
alientek_davincipro: fix part number
2024-04-25 07:42:19 +07:00
7cfc622353
Merge pull request #583 from hansfbaier/alientex_davincipro
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alientek davincipro: fix speedgrade
2024-04-23 15:54:33 +02:00
a6b8457111
target/efinix_ti60_f225: Add L2 Cache (16KB for now) to improve perfs/Coremark.
2024-04-23 11:45:07 +02:00
e4a15f6064
targets/alinx_axau15: Remove unwanted add_sdcard() call.
2024-04-23 11:40:01 +02:00
e0e2bf8f97
add Alientek DaVinci Pro FPGA board
2024-04-22 14:44:53 +07:00
110c051779
add Alientek DaVinci Pro FPGA board
2024-04-22 13:46:39 +07:00
aaab2dcfe2
alinx_axau15: Add PCIe speed support (Gen3 or Gen4) and add SDCard parameter.
2024-04-19 14:35:13 +02:00
3dc2fb9c0d
ti60_f225_dev_kit: Remove Ethernet/Etherbone debug that is no longer useful.
2024-04-12 12:21:36 +02:00
fad45b45c1
targets/limesdr_mini_v2.py: allows using jtag_uart and added a note to load a demo firmware with litex_term + jtag_uart
2024-04-11 15:12:17 +02:00
24db5783c1
adi_adrv2crr: Fix typo in PMOD pinout
...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2024-04-10 14:06:47 +02:00
62b5b58aec
platforms,targets/xilinx_zc706: added choice between vivado(default) and openFPGALoader, re-enable DDR
2024-04-08 20:38:09 +02:00
3bd14f541e
platforms/xilinx_zc706: added missing i2c node
2024-04-05 10:47:33 +02:00
d2d38794f4
Merge pull request #579 from hansfbaier/qmtech-altera-sdram-attrs
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Better Altera SDRAM IO properties for more speed
2024-04-04 10:56:37 +02:00
cb84141cec
Merge pull request #578 from hansfbaier/qmtech-optional-core-resources
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qmtech core boards: make core resources optional
2024-04-04 10:56:02 +02:00
44ab802ae6
Merge pull request #577 from hansfbaier/qmtech-ddr3-fix
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qmtech_artix7_fgg676/fbg484: fix wrong memory chip type
2024-04-04 10:55:06 +02:00
bce119e0c3
litex_acorn_baseboard_mini: Proper fix to allow simultaneous Ethernet and SATA.
...
Tested successfully with ./litex_acorn_baseboard_mini.py --with-etherbone --with-sata --build --load.
-> Able to ping 192.168.1.50
-> Able to initialize SATA:
litex> sata_init
Initialize SATA...
Model: WDC WDS120G1G0A-00SS50
Capacity: 120GB
Successful.
2024-04-04 10:52:56 +02:00
d24e69c112
litex_acorn_baseboard_mini: Try to share QPLL to allow enabling SATA and Ethernet/Etherbone simultaneously.
2024-04-03 12:04:36 +02:00
934002e7e6
targets/alinx_axau15: Avoid USPHBMPCIEPHY workaround.
2024-04-02 12:46:11 +02:00
e4c4391a9c
colorlight_i9plus: Switch to OpenFPGALoader for loading bitstreams.
2024-04-02 08:44:25 +02:00
7d89aa0fe9
qmtech altera boards: sdram io properties for more speed
2024-03-30 20:43:41 +07:00
2392473b89
targets/xilinx_zc706: typo ZCU -> ZC
2024-03-30 11:54:28 +01:00
af1cdc4ed9
qmtech core boards: make core resources optional
2024-03-30 09:59:22 +07:00
a72f2a2e68
targets/xilinx_zc706: typo...
2024-03-29 07:18:19 +01:00
27dce96bf8
targets/xilinx_zc706: SFP/etherbone working: added a note to use it
2024-03-29 07:16:53 +01:00
917ae33351
targets/xilinx_zc706: temporary disabled ddr3
2024-03-29 07:11:06 +01:00
5629f9e97a
qmtech_artix7_fgg676: fix wrong memory chip type
2024-03-29 08:41:19 +07:00
2505aeb9b4
qmtech_wukong: Switch to direct instance of LiteEthPHYGMII since hybrid MII/GMII does not seems to work correctly.
2024-03-28 16:02:55 +01:00
b6b3226192
qmtech_wukong: Add --remote-ip argument.
2024-03-28 15:50:54 +01:00
4ca13943eb
qmtech_wukong: Change --board-version to --revision as on other boards.
2024-03-28 15:30:57 +01:00
4df2ab98e7
qmtech_wukong: Add V3 support and minor cleanups.
2024-03-28 15:23:58 +01:00
9235468ce1
qmtech_wukong: Minor cleanups.
2024-03-28 14:50:03 +01:00
57a9970257
xilinx_zc706: ADD DDR3 support in target and update/fix IOs definition in platform (Untested on hardware).
...
- Use/Mimic IO standards from KC705.
- Keep it to single rank for now (but add dual rank IOs in comments).
- Add DCI cascade property.
- Add sys4x and idelay clocking.
- Add LiteDRAM PHY/Core support.
2024-03-27 08:51:30 +01:00
ded90748ee
xilinx_kc705: Minor Cleanup/Update.
2024-03-27 08:48:05 +01:00
d582515af4
Merge pull request #576 from trabucayre/zc706_next
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xilinx_zc706: Add missing peripherals/resources.
2024-03-27 08:26:44 +01:00
e51b9eb392
sipeed_tang_mega_138k_pro: Fix previous commit.
2024-03-26 22:05:20 +01:00
40c7a63e53
Finish tang_mega_138k renaming to tang_mega_138k_pro.
2024-03-26 21:58:02 +01:00
6ec1cfe401
xilinx_zc706: add missing peripherals/resources
2024-03-26 21:57:21 +01:00
d5038dec61
Merge pull request #572 from AlanCui4080/master
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Rename sipeed_tang_mega_138k.py to sipeed_tang_mega_138k_pro.py
2024-03-26 21:55:11 +01:00
8a5b83125b
xilinx_zc706: Add Ethernet/Etherbone support through SFP/K7_1000BaseX (Untested on hardware).
2024-03-26 21:53:45 +01:00
a29532b5d7
xilinx_zc706: Add PCIe Gen2 X4 support (Untested on hardware).
2024-03-26 21:41:41 +01:00
fdd4edbd1a
xilinx_zc706: Review/Minor changes.
2024-03-26 21:35:10 +01:00
6b35c47e8b
xilinx_zc706: new Xilinx/AMD Zynq7000 based board
2024-03-26 20:49:54 +01:00
1655cbf62f
alinx_axau15: Add manual loc constraints on PCIe GTHE4 channels to avoid Vivado to remap them.
...
Board now correctly seen with lspci.
2024-03-26 14:12:26 +01:00
8f7ba0ae28
Merge pull request #573 from Xilokar/master
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Fix sqrl_acorn proxy bitstream for cle-101
2024-03-26 12:36:56 +01:00
02ab7ee692
Merge pull request #571 from skrutt/master
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Correct pinout for VGA connector
2024-03-26 12:35:37 +01:00
cc7f092520
alinx_axau15: Fix PCIe support compilation (still needs proper instance name).
...
Not yet working on hardware.
2024-03-25 19:11:33 +01:00
191a5bb17a
alinx_axau15: Add RGMII Ethernet/Etherbone support.
2024-03-25 16:08:38 +01:00
9d083eb8bd
sqrl_acorn: the litefury (cle-101 variant is a xc7a100t, so use the right proxy when flashing
2024-03-22 10:01:43 +01:00
11bf6ea703
targets/siglent_sds1104xe.py: added note on how to use crossover with jtagbone
2024-03-20 16:58:38 +01:00
785bf15bba
prog/openocd_xc7z_ft232.cfg: openOCD config file for zynq7000 with digilent hs2 probe (tested with siglent SDS1104XE).
2024-03-20 16:56:44 +01:00
8dea12d48f
platforms/fairwaves_xtrx: Update with developments from XTRX-Julia project and simplify variants/switch to openFPGALoader.
2024-03-19 11:49:48 +01:00
abaa6b9a90
Rename sipeed_tang_mega_138k.py to sipeed_tang_mega_138k_pro.py
2024-03-19 17:21:21 +08:00
f50ee97520
alinx_axau15: Minor adjustments.
2024-03-14 15:13:59 +01:00
93ba4aba6e
Add support for CTUCAN for Genesys2 board
2024-03-13 06:51:48 +01:00
e980798437
gsd_orangecrab: Add --without_dfu_rst argument to allow disabling reset to DFU on Button press.
...
This is useful in some case where were button input is force through hardware change to force DFU to be in reset at startup.
2024-03-11 17:23:42 +01:00
0ec5624875
Correct pinout for VGA connector
2024-03-08 10:22:32 +01:00
91aff9816d
targets/litex_acorn_baseboard_mini: Add with_dram parameter to allow build without DRAM.
2024-03-07 18:30:18 +01:00
232ccb3214
Add support for CTUCAN for Arty board
2024-03-05 11:53:54 +01:00
8ce88ee51e
Merge pull request #569 from trabucayre/olimex_gatemate_a1_evb
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Olimex gatemate a1 evb
2024-03-05 09:38:03 +01:00
0b5727692f
litex_acorn_baseboard_mini: Fix imports.
2024-03-04 13:22:41 +01:00
e1e989acac
Olimex GateMate A1 EVB: new Board
2024-03-02 12:23:27 +01:00
85971de42e
Merge pull request #568 from hansfbaier/qmteck-k325-fix
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Enable bitstream compression on Kintex K325T
2024-03-02 10:42:20 +01:00
e5d8f62c83
enable bitstream compression on Kintex K325T
2024-03-02 07:48:12 +07:00
8b80cc1c3a
litex_acorn_baseboard_mini: Add SATA support (Gen1 and Gen2).
2024-02-29 14:36:51 +01:00
9dd246c26e
Merge pull request #567 from trabucayre/gatemate_evb
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adding colognechip_gatemate_evb
2024-02-28 17:35:48 +01:00
fab6bcf514
Merge pull request #566 from hansfbaier/qmteck-k325-fix
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Qmtech k325: fix wrong button assignment
2024-02-28 17:35:04 +01:00
af09c81db6
adding colognechip_gatemate_evb
2024-02-28 17:27:21 +01:00
82c0e191a7
QMTech XC7K325T: use the buttons on the core board
2024-02-28 04:40:17 +07:00
33a0975dd7
litex_acorn_baseboard_mini: Allow configurable sys_clk_freq with Ethernet/Etherbone.
2024-02-27 12:38:08 +01:00
72ea25512b
QMTech XC7K325T: remove wrong reset button assignment
2024-02-27 15:42:38 +07:00
7bc03e5fbc
targets/litex_acorn_baseboard_mini: Make it similar to other targets and keep SoC + UART + DRAM + Ethernet.
2024-02-26 17:29:09 +01:00
aa34acc426
targets/digilent_arty: Allow --with-ethernet and --with-etherbone and remove --with-hybrid.
2024-02-26 15:56:58 +01:00
feae57e7fb
target/qmtech_kintex7_devboard: +X.
2024-02-26 15:41:09 +01:00
23313de1b4
targets: Add initial litex_acorn_baseboard_mini target from acorn_baseboard repository.
2024-02-26 12:25:15 +01:00
6d07eda3c0
targets/digilent_arty: Fix indent on with_usb.
2024-02-21 10:06:49 +01:00
68e0453677
targets/digilent_arty: Move USB integrated to BaseSoC.
2024-02-21 09:03:53 +01:00
8242ab3974
targets/digilent_arty: Add Ethernet/Etherbone Hybrid mode + USB-Host (through Machyne PMOD).
2024-02-20 19:44:10 +01:00
9c3f272f6e
platforms/lambdaconcept_ecpix5: Minor cleanup.
2024-02-09 12:20:12 +01:00
f7c7a5a7e5
Merge pull request #563 from smunaut/adi
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Some minor updates to the ADI ADRV2CRR board
2024-02-06 16:33:53 +01:00
a6f8f0e696
Merge pull request #561 from ruurdk/qmtech
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Add support for QMTech Kintex 7 Development board
2024-02-06 16:29:54 +01:00
b3caabcca3
di_adrv2crr_fmc: Bump PCIe to 8 lanes
...
There used to be an issue with 8 lanes litepcie USP for that board
when it was first added, but it's been solved now, so might as well
use all the available lanes
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2024-02-05 11:43:02 +01:00
2264df8a0a
adi_adrv2crr_fmc: Speedgrade of the PLL is -2
...
Speedgrade of the chip was updated in a previous commit, but
I forgot to update the PLL too
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2024-02-05 11:42:14 +01:00
66152390ba
Add support for QMTech Kintex 7 Development board
2024-02-01 16:16:01 +01:00
741082e5ee
Merge branch 'litex-hub:master' into axau15_update
2024-01-27 03:28:28 +01:00
721fa0b4b3
axau15: added more FMC+ pins and made some corrrections
2024-01-27 03:27:48 +01:00
39dc0b36a4
sipeed_tang_mega_138k: Fix build with ethernet and local/remote ip indent.
2024-01-22 13:20:07 +01:00
dbcd5bc3f5
Merge pull request #559 from racerxdl/master
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sipeed_tang_mega_138k: Added PCIe reset and other pins from sipeed dock
2024-01-15 08:42:37 +01:00
261c61cf62
targets/sipeed_tang_nano_4k: Remove commited spiflash.o.
2024-01-14 11:24:18 +01:00
3438f74224
sipeed_tang_mega_138k: Added PCIe reset and other pins from sipeed documentation
2024-01-13 04:38:54 -03:00
926d54cb41
sipeed_tang_nano_4k: Switch to LiteX's UART and expose hyperram parameter.
2024-01-11 13:54:44 +01:00
688a020f35
sipeed_tang_meta_138k: Add gowin_ae350 CPU initial support.
...
./sipeed_tang_mega_138k.py --cpu-type=gowin_ae350 --build --flash
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2024 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Jan 11 2024 12:37:50
BIOS CRC passed (0efaefbe)
LiteX git sha1: e689aab1
--=============== SoC ==================--
CPU: Gowin AE350 @ 800MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 128.0KiB
SRAM: 8.0KiB
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex> ident
Ident: LiteX SoC on Tang Mega 138K 2024-01-11 12:37:47
2024-01-11 13:17:05 +01:00
29143a89f8
platforms/sipeed_tang_mega_138k: adding some resources/connectors definition (SPI flash, Buttons, SDRAM connector)
2024-01-10 10:37:01 +01:00
52f9f0f107
Merge pull request #555 from machdyne/master
...
add support for minze board
2024-01-07 08:10:51 +01:00
52aeec00d7
sipeed_tang_nano_4k: Remove note since openFPGALoader regression has been fixed.
2024-01-04 18:29:31 +01:00
c0a98a6b9d
targets/sipeed_tang_nano_4k: Directly integrate flashing of EMCU flash.
...
Ex to build/flash bitstream + firmware with EMCU:
./sipeed_tang_nano_4k.py --cpu-type=gowin_emcu --build --flash
2024-01-03 13:07:44 +01:00
55ade3b2df
sipeed_tang_nano_4k: Minor cleanup/add comments.
2024-01-02 13:42:56 +01:00
fd59d954ba
add support for minze board
2023-12-29 06:01:59 +01:00
982038508e
alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards).
2023-12-28 19:56:52 +01:00
e229d1a0b6
alinx_axau15: First review/cleanup pass and fix missing INTERNAL_VREF on bank 66.
2023-12-28 19:48:50 +01:00
b340d9e5e7
Merge pull request #550 from Johnsel/master
...
alinx_axau15: Added new Alinx Artix US+ board
2023-12-28 19:24:14 +01:00
754b6d2427
add support for mozart ml1
2023-12-19 22:18:21 +01:00
e8bc9fa81d
targets/sipeed_tang_nano_4k: adding description to write Gowin EMCU firmware
2023-12-14 13:24:57 +01:00
4166a94a1f
prog/openocd_ecpix5.cfg: refresh/fix
2023-12-13 18:34:02 +01:00
2c2b3e318a
Fixed pinout and first steps adding PCIe support
2023-12-12 15:44:51 +01:00
ab60d91138
alinx_axau15: Fixed minor clock and sdcard reference issues
2023-12-05 21:14:57 +01:00
7be052911b
alinx_axau15: Added new Alinx Artix US+ board
2023-12-05 20:45:57 +01:00
ba86121ea9
platforms/efinix_trion_t120_bga576_dev_kit: P2/P3 description
2023-11-14 19:27:59 +01:00
6333fbe724
targets/siglent_sds1104xe: Update with new LiteX Ethernet/Etherbone integration.
2023-11-13 09:02:09 +01:00
1969b4f6d3
siglent_sds1104xe: Update Ethernet/Etherbone integration.
2023-11-10 18:58:42 +01:00
0ee5fedb63
platforms/sipeed_tang_mega_138k: move RGMII Ethernet to dock_io
2023-11-10 07:41:09 +01:00
fd36608438
sipeed_tang_mega_138k: fix pins DRIVE, remove a[15], fix memory model
2023-11-10 07:39:19 +01:00
17a0152ef9
Merge pull request #547 from trabucayre/tangMega138k
...
Tang mega138k
2023-11-09 11:56:58 +01:00
4ff1362e5b
targets,platforms/sipeed_tang_mega_138k: fix copyright
2023-11-09 11:55:35 +01:00
8e3dc21ce5
aliexpress_xc7k70t: Review/Cleanup.
...
- Cosmetic cleanups in platform.
- Add clk50 constraint.
- Remove JTAGBone specific support since now directly handled by LiteX.
2023-11-09 08:26:06 +01:00
69ee48d421
Add AliExpress Kintex XC7K70T board
2023-11-09 10:34:18 +07:00
2c52ce0c47
targets/sipeed_tang_mega_138k: fix SDRAM (requires Mister XSDS v3.0 extension)
2023-11-08 07:13:28 +01:00
e9f53685fe
targets/sipeed_tang_mega_138k: DDR3 support (not working)
2023-11-08 07:00:24 +01:00
8c3ac2f114
platforms/sipeed_tang_mega_138k: DDR3 IOs
2023-11-08 07:00:18 +01:00
d4e73fd389
platforms/sipeed_tang_mega_138k: fix sdram_connector pinout and move to _dock_io
2023-11-08 07:00:01 +01:00
bc74eeca78
targets/digilent_nexys_video: Use reset_buf on sys_clk's create_clkout to improve timings and demonstrate use.
2023-11-07 13:22:30 +01:00
c7ad9adacb
terasic_de2_115: Cosmetic cleanup.
2023-11-06 19:21:53 +01:00
d8228c2c0f
Merge pull request #544 from madprogrammer/master
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Improve terasic_de2_115 target support
2023-11-06 19:17:54 +01:00
e23ac0251a
targets/sipeed_tang_mega_138k: HDMI support
2023-11-05 16:36:59 +01:00
e90c08cb30
platforms/sipeed_tang_mega_138k: adding dock io and DVI RX/TX
2023-11-05 16:26:33 +01:00
e9fd7433a6
platforms/sipeed_tang_mega_138k: adding module connectors
2023-11-05 16:25:38 +01:00
e9f26e1729
platforms/sipeed_tang_mega_138k: swapping serial pins
2023-11-05 16:23:59 +01:00
Gwenhael Goavec-Merou
Florent Kermarrec
Fin Maaß
Akio
Hans Baier
Sylvain Munaut
Xilokar
AlanCui
Saket Sinha
skrutt
Gwenhael Goavec-Merou
Ruurd Keizer
John Simons
Lucas Teske
inc
Hans Baier