Commit graph

1034 commits

Author SHA1 Message Date
Florent Kermarrec
9faa805ab9 alinx_ax7010: Review/Cleanup. 2022-03-17 11:31:02 +01:00
enjoy-digital
3aa1042f5f
Merge pull request #367 from ggangliu/zynq_xc7z010
Add ALINX AX7010 board support
2022-03-17 09:52:04 +01:00
Florent Kermarrec
496b2cfab9 targets/gowin: Switch to get_bitstream_filename. 2022-03-17 09:40:10 +01:00
Florent Kermarrec
773444a7dd targets: Switch to get_bios_filename/get_bitstream_filename. 2022-03-17 09:21:05 +01:00
Yonggang Liu
94786cae19
Update and rename xilinx_alinx_ax7010.py to alinx_ax7010.py 2022-03-17 11:24:24 +08:00
Florent Kermarrec
0745162a29 xilinx_zcu102: Review/Cleanup for consistency with others boards.
Also remove INTERNAL_VREF constraints that are not yet useful (required for DRAM).
2022-03-16 18:47:05 +01:00
Joseph Faye
adbcc2e547
add zcu102 target file 2022-03-16 15:55:37 +01:00
Yonggang Liu
9dad1cb244
Rename xilinx_zynq_xc7z010.py to xilinx_alinx_ax7010.py 2022-03-15 15:51:13 +08:00
Yonggang Liu
9c55773275
Add files via upload
Add zynq_xc7z010 board support
2022-03-12 12:33:41 +08:00
Gabriel Somlo
9f9afeaafa targets/nexys-video: Add support for sata pll refclk 2022-03-11 14:40:21 -05:00
enjoy-digital
3b74673a93
Merge pull request #363 from curliph/master
add Gowin programmer support
2022-03-08 17:26:50 +01:00
Florent Kermarrec
f52a915487 lambdaconcept_ecpix5: Add initial Video support at 640x480 (with Terminal/Framebuffer).
I2C intialization code adapted from https://github.com/ultraembedded/ecpix-5.

Tested with:
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-terminal --build --load
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-framebuffer --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Mar  8 2022 15:34:22
 BIOS CRC passed (c7fe9ecd)

 Migen git sha1: ac70301
 LiteX git sha1: 7ebc7625

--=============== SoC ==================--
CPU:		FireV-STANDARD @ 75MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
L2:		8KiB
SDRAM:		524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b00: |01110000| delays: 02+-01
  m0, b01: |00000000| delays: -
  m0, b02: |00000000| delays: -
  m0, b03: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b00: |01110000| delays: 02+-01
  m1, b01: |00000000| delays: -
  m1, b02: |00000000| delays: -
  m1, b03: |00000000| delays: -
  best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 23.4MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on ECPIX-5 2022-03-08 15:34:19
2022-03-08 15:40:52 +01:00
Florent Kermarrec
39e4e211bb targets/decklink_mini_4k: Add build/use instructions. 2022-03-08 14:14:18 +01:00
curliph
2df7fd573c
Update sipeed_tang_nano_9k.py
Add Gowin programmer support
2022-03-08 14:04:28 +08:00
curliph
4c9bc53a3c add Win/powershell and WSL support 2022-03-08 13:24:56 +08:00
Sylvain Munaut
ec28ca8fa3 adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM
This is a carrier board with a SoM mounted on it.
There is also an FMC connector that can accept another
AD-FMCOMMS8-EBZ to get two more ADRV9009 RFIC but support for
that is not added yet.

Note that the PCIe support requires :
 - Change the .xci in the litepcie to use the right Quad
 - Revert litex 3c34039b731b42e27e2ee6c8e399e5eb8f3a058f so the
   timing constrainst of litepcie apply correctly

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-03 22:17:09 +01:00
Florent Kermarrec
0f2e13fdf7 sqrl_fk33: Add HBM2 support (from https://github.com/enjoy-digital/fk33_hbm2_test). 2022-03-03 17:34:48 +01:00
Florent Kermarrec
99a66274c8 xilinx_alveo_u280: Switch HBM2 to USPHBM2 now integrated in LiteX. 2022-03-03 16:11:48 +01:00
Florent Kermarrec
b80c7a7843 targets/sqrl_acorn: write_latency_calibration now disabled by default, no longer required. 2022-03-03 15:50:53 +01:00
Alessandro Comodi
db2d83ea29 antmicro_datacenter: use 100 MHz and add i2c master
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-01 13:00:36 +01:00
Piotr Binkowski
0b80890119 antmicro_datacenter: add 1 cycle of latency for RCD IC 2022-03-01 12:43:08 +01:00
Piotr Binkowski
9976b47f72 antmicro_datacenter: generate outputs for rowhammer-tester 2022-03-01 12:43:08 +01:00
Karol Gugala
5359fc5bfc antmicro_datacenter: use A7DDRPHY
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2022-03-01 12:43:08 +01:00
Florent Kermarrec
2c4d31066f digilent_arty_z7: Defaults to no_uart. 2022-03-01 11:15:30 +01:00
Florent Kermarrec
673676e3cb digilent_arty_a7: Switch to VivadoProgrammer. 2022-03-01 10:48:22 +01:00
enjoy-digital
1320f3bd23
Merge pull request #357 from DaveBerkeley/colorlight_i9
Add ColorLight i9 v7.2
2022-03-01 10:07:55 +01:00
Florent Kermarrec
a19c03fa55 targets: Switch to generic/portable HyperRAM core from LiteX. 2022-03-01 09:10:19 +01:00
Dave Berkeley
c9d009c735 Add ColorLight i9 v7.2 2022-02-28 14:08:49 +00:00
inc
2311db18f8 add initial support for kröte fpga board 2022-02-25 14:22:19 +01:00
Florent Kermarrec
1623ba5942 targets/stlv7325: Reduce sys_clk_freq to 100MHz.
See https://github.com/enjoy-digital/litedram/issues/285.
2022-02-25 09:04:07 +01:00
Florent Kermarrec
872113e1cc stlv7325: Add SDCard support. 2022-02-24 18:02:43 +01:00
Florent Kermarrec
a08f346d90 stlv7325: Add Etherbone support (untested). 2022-02-24 17:43:53 +01:00
Florent Kermarrec
b1550f006a stlv3225: Minor Review/Cleanup, switch to JTAG HS2 programmer. 2022-02-24 17:17:08 +01:00
Andrew Gillham
174d958ca7 Initial support for STLV7325 Kintex-7 board. 2022-02-23 18:28:55 +01:00
enjoy-digital
6661947d96
Merge pull request #354 from madscientist159/master
Add initial support for RCS Arctic Tern boards
2022-02-23 18:06:08 +01:00
Florent Kermarrec
1717af68ac targets/sqrl_acorn/ddr3: Disable write_latency_calibration.
Introduce some memtest failures on some boards.
2022-02-23 10:38:43 +01:00
Raptor Engineering Development Team
ae4b3c0938 Add initial support for RCS Arctic Tern boards 2022-02-21 20:04:51 -06:00
Ilia Sergachev
85397818d9 add Xilinx ZCU216 support 2022-02-21 19:14:13 +01:00
Florent Kermarrec
7d84e6e863 efinix_titanium_ti60_t225: Add SPI/Native SDCard support.
Both modes working with 8559b88ad8.
2022-02-21 10:35:06 +01:00
Florent Kermarrec
df36cdbcc9 siglent_sds1104xe: Switch back to native DRAM width (now possible with Nax). 2022-02-18 11:47:08 +01:00
Florent Kermarrec
d85f88f42a siglent_sds1104xe: Reduce DRAM's width to 16-bit for now (to use NaxRiscv). 2022-02-16 17:59:40 +01:00
Florent Kermarrec
08a79fa3ac lattice_ecp5_vip: Minor cleanups, fix CI. 2022-02-15 10:58:38 +01:00
enjoy-digital
30afe26669
Merge pull request #348 from hubmartin/ecp5-vip
Draft: Add Lattice ECP5 VIP board + HDMI output board support
2022-02-15 08:53:57 +01:00
enjoy-digital
896884dd21
Merge branch 'master' into axu2cga_software 2022-02-15 08:21:29 +01:00
Florent Kermarrec
3f58df9974 platforms/targets: Fix typos. 2022-02-14 17:26:46 +01:00
Gwenhael Goavec-Merou
5eca41ac73 targets/alinx_axu2cga: adding PS software support (inspired by xilinx_kv260) 2022-02-12 18:24:01 +01:00
Gwenhael Goavec-Merou
d672d9a9b1 targets: s/alinx_axu2gca/alinx_axu2cga/gc 2022-02-12 18:12:45 +01:00
hubmartin
c2cd4410df
Code cleanup, add copyright
Signed-off-by: hubmartin <hub.martin@gmail.com>
2022-02-12 17:50:07 +01:00
Florent Kermarrec
c0e671919d sqrl_acorn: Downgrade to SATA Gen1 for now (allow lower sys_clk_freq and enough for current tests). 2022-02-09 19:10:12 +01:00
Florent Kermarrec
d9b77c6f25 digilent_arty: Add --flash support. 2022-02-09 17:51:56 +01:00
Florent Kermarrec
4894926c40 xilinx_kv260: +x. 2022-02-09 16:01:51 +01:00
hubmartin
27b03df886
Add Lattice ECP5 VIP board + HDMI output board support 2022-02-08 21:47:58 +01:00
Sergiu Mosanu
450a26f395 Merge branch 'master' of https://github.com/litex-hub/litex-boards 2022-02-08 12:55:09 -05:00
Sergiu Mosanu
7ed633dc4b add guideline for serial interface 2022-02-08 12:54:34 -05:00
Sergiu Mosanu
5a0f69502b enable use of HBM for linux boot 2022-02-08 12:18:38 -05:00
Florent Kermarrec
18e8bec9d4 xilinx/kv260: Minor cleanup and add Build/Use instructions (from PR). 2022-02-07 08:12:43 +01:00
enjoy-digital
8621700916
Merge pull request #345 from sergachev/feature/xilinx_kv260
Add Xilinx KV260 support
2022-02-07 07:53:55 +01:00
Ilia Sergachev
1d8c3789af add Xilinx KV260 support 2022-02-06 14:38:57 +01:00
Ben Stobbs
617fa26acd
Add 85F to help for orangecrab device
The 85F orangecrab board exists, and works fine when this option is set to 85F, but leaving it out of the help is a bit confusing.
2022-02-06 10:36:58 +00:00
Florent Kermarrec
346623fd06 trellisboard: Rename Video I2C to videoi2c. 2022-02-04 09:26:31 +01:00
Florent Kermarrec
6d4fe82179 trellisboard: Rename hdmi_i2c to i2c (to have access to i2c_scan in the BIOS). 2022-02-02 11:08:21 +01:00
Florent Kermarrec
0522d8b0c5 trellisboard: Update i2c.add_init call. 2022-02-02 10:59:54 +01:00
Florent Kermarrec
7f4d464f1b trellisboard: Add Video Terminal/Framebuffer support and use new I2C init feature to automatically configure TP410 at startup. 2022-02-02 09:52:12 +01:00
Florent Kermarrec
4251cfa865 terasic_de0nano: Add Build/Use instructions with JTAG-UART. 2022-02-01 15:58:34 +01:00
Florent Kermarrec
4d45611935 targets: Replace JTAG Atlantic (Deprecated) with JTAG-UART. 2022-02-01 11:30:26 +01:00
enjoy-digital
9144cb44fb
Merge branch 'master' into jev/deca-eth 2022-01-31 16:22:58 +01:00
Jevin Sweval
fbd424fc48 DECA: Add Ethernet and Etherbone support
Also fixed pcf_en IO standard compared to golden Arrow project.
2022-01-29 15:15:53 -08:00
Jevin Sweval
9e5224ca49 Add JTAGbone support to Terasic DECA
Along the way I added UARTbone support to DECA as well for debugging.

Examples:

./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover

./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
2022-01-27 14:13:58 -08:00
Gwenhael Goavec-Merou
dd134a4b7d digilent arty z7: allows toolchain selection (PL only) 2022-01-26 07:30:06 +01:00
Florent Kermarrec
74395ca80b digilent_nexyx_video: Add default toolchain value to CRG (to avoid breaking existing designs). 2022-01-25 16:13:57 +01:00
Florent Kermarrec
624572f2e9 alinx_axu2gca: Review and do minor cosmetic changes. 2022-01-25 14:58:47 +01:00
Gwenhael Goavec-Merou
537f04a13d alinx_axu2gca: new board
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2022-01-25 07:35:42 +01:00
Florent Kermarrec
621d45cd9e digilent_arty: Review and improve CRG to avoid specific yosys+nextpnr code.
sys4x/sys4x_dqs/idelay clks can be disabled when integrated-main-ram is used.
2022-01-24 19:16:07 +01:00
enjoy-digital
c2276c1e6d
Merge pull request #338 from suarezvictor/master
Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 19:02:59 +01:00
Florent Kermarrec
1abb03e514 tang_nano_4k: Review/Cleanup:
- Revert abstractions on clk_name/period: Too much abstraction to avoid duplications makes the code more difficult to read.
ex:
  - When constraining clk27, frequency is already in the name.
  - In the target, we want to know we are using clk27 as the main clk.
  - We need a default sys_clk_freq for project only importing BaseSoC.
- Revert SPI Flash import (for consistency with other targets).
- Keep VexRiscv as default CPU since this target is able to run it and also for consistency with other targets.
2022-01-24 18:46:51 +01:00
enjoy-digital
e357eb6d8f
Merge pull request #337 from sergachev/tang_nano_4k_emcu
Enable LiteX BIOS on ARM core on Tang nano 4K
2022-01-24 18:36:10 +01:00
Florent Kermarrec
cc1b46f106 tang_nano_9k: Fix HyperRAM integration. 2022-01-24 18:35:12 +01:00
Victor Suarez Rovere
db77ea5c7a Add tweaks to Arty board to support yosys+nextpnr toolchain 2022-01-24 02:06:34 -03:00
Ilia Sergachev
6238052b10 tang nano 4k: disable spi flash with gowin emcu, cleanup 2022-01-23 16:10:46 +01:00
Ilia Sergachev
6c81fc708c tang nano 4k: add memory regions, set default cpu 2022-01-23 13:05:51 +01:00
enjoy-digital
787f44e7d9
Merge pull request #336 from tcal-x/cmod-a7-flash
Digilent CMOD A7: add flash support.
2022-01-23 08:36:49 +01:00
Tim Callahan
6567af6f49 Digilent CMOD A7: add flash support.
Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.

Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-22 18:50:12 -08:00
Icenowy Zheng
f533e7f8ba sipeed_tang_nano_9k: enable copackaged PSRAM
Also enable SPI SDCard which was pending by the lack of main_ram
previously.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-23 03:37:03 +08:00
enjoy-digital
999dbd572f
Merge pull request #334 from Icenowy/tang9k
sipeed_tang_nano_9k: new board
2022-01-22 15:49:08 +01:00
Icenowy Zheng
e699c377a5 sipeed_tang_nano_9k: new board
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-22 11:45:49 +08:00
vacajk
e9d4d9066a xilinx_zcu106: add DDR4 interface and fix reset error 2022-01-22 03:08:21 +08:00
enjoy-digital
b8aad4b030
Merge pull request #332 from tcal-x/prog-cmod-a7
Add openocd programmer for Digilent CMOD A7.
2022-01-21 08:05:22 +01:00
Tim Callahan
e0c4c0fe39 Add openocd programmer for Digilent CMOD A7.
Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-20 20:54:03 -08:00
Ilia Sergachev
0e91013fc7 quickfeather: fix path to libeos library when board script called not from its directory; fix wget redownloads; add libeos to gitignore 2022-01-20 18:43:59 +01:00
Florent Kermarrec
5f2ccb2d32 targets: Switch from bridge to crossover. 2022-01-19 17:03:17 +01:00
Florent Kermarrec
abb54cebb3 trenz_c10lprefkit: Add Etherbone support. 2022-01-19 14:47:14 +01:00
enjoy-digital
1ce978806d
Merge pull request #328 from sergachev/fix/zedboard_software
Fix Zedboard software
2022-01-19 10:05:49 +01:00
Florent Kermarrec
f11106e9c5 targets/digilent_cmod_a7: Simplify/Cleanup. 2022-01-19 10:03:20 +01:00
enjoy-digital
f8e3cc5361
Merge pull request #327 from bl0x/digilent_cmod_a7
digilent_cmod_a7: Remove unused clocks.
2022-01-19 09:59:44 +01:00
Ilia Sergachev
bbf13f4439 zedboard: remove a hack 2022-01-19 02:41:11 +01:00
Ilia Sergachev
4f4d47dcdd zedboard: correct memory map 2022-01-19 02:40:54 +01:00
Florent Kermarrec
fccb952c4b target: Remove ident_version=True no longer required. 2022-01-18 17:13:02 +01:00
Florent Kermarrec
7114911cea targets: --no-ident-version is now directly provided by LiteX, remove it on targets implementing it. 2022-01-18 16:47:38 +01:00
Florent Kermarrec
d92a2b82fb targets/l2_cache_reverse: Now defaulting to False in LiteX, so setting it to False for correct Framebuffer operations is no longer required. 2022-01-18 11:37:55 +01:00
Bastian Löher
2c26f07a5a digilent_cmod_a7: Remove unused clocks. 2022-01-17 22:49:10 +01:00
Florent Kermarrec
12fa844b56 decklink_mini_4k: Add dedicated SATA PLL to allow SATA + Framebuffer. 2022-01-17 18:11:52 +01:00
Florent Kermarrec
f97e48e4f3 decklink_mini_4k: Add SATA support (over PCIe2SATA). 2022-01-17 14:19:59 +01:00
Florent Kermarrec
3e187dea42 quicklogic_quickfeather: Make imports similar to other boards. 2022-01-17 10:00:58 +01:00
enjoy-digital
99752738b0
Merge pull request #326 from litex-hub/pr322
quicklogic_quickfeather: add eos_s3 arm software support library
2022-01-17 09:56:41 +01:00
Ilia Sergachev
9984bb8ffb quicklogic_quickfeather: add eos_s3 arm software support library 2022-01-17 09:47:38 +01:00
Florent Kermarrec
06fb73ace3 targets/digilent_nexys_video: Remove SATA Gen3 support (max linerate=3.75Gbps with -1 speedgrade). 2022-01-17 08:45:24 +01:00
enjoy-digital
ed04e5f95c
Merge pull request #325 from gsomlo/gls-sata-gen
targets/digilent_nexys_video: add SATA generation argument
2022-01-17 08:41:29 +01:00
Florent Kermarrec
6103b3b234 targets/colorlight_5a_75x: List 8.0 in supported revision. 2022-01-17 08:27:19 +01:00
Gabriel Somlo
5c2d85e6a3 targets/digilent_nexys_video: add SATA generation argument 2022-01-16 19:59:36 -05:00
Bastian Löher
1077e23e62 digilent_cmod_a7: Also propagate here. 2022-01-16 11:58:14 +01:00
Florent Kermarrec
296c99f065 digilent_pynq_z1: Do minor cosmetic cleanups. 2022-01-14 09:39:42 +01:00
Florent Kermarrec
45cfe2be6b qmtech_ecp4ce15/ecp4ce55: Merge in qmtech_ecp4cex5.
Defaults to ecp4ce15, ecp4ce55 can be selected with --variant=ecp4ce55.
2022-01-14 09:33:29 +01:00
enjoy-digital
830757502f
Merge pull request #321 from r4d10n/master
Support for Digilent Pynq Z1
2022-01-14 08:48:26 +01:00
Rakesh Peter
a3d168e4c0
HDMI Terminal Support
Copyright notice update.
2022-01-13 23:28:43 +05:30
Florent Kermarrec
e27d49114f Add initial and minimal ZCU106 support (with Clk/Leds/UART). 2022-01-13 17:40:03 +01:00
Rakesh Peter
ed50c84e0d
Support for Digilent Pynq Z1 2022-01-11 19:33:12 +05:30
Alastair M. Robinson
c57ea732dd Added QMTech EP4CE55 board - almost identical to EP4CE15 board but bigger FPGA. 2022-01-07 19:27:40 +00:00
Florent Kermarrec
8a33c2aa31 targets: Ensure litex.soc.cores.spi_flash is no longer imported/used. 2022-01-07 19:07:14 +01:00
Florent Kermarrec
4b6a9b2cf0 targets/spiflash: Simplify self.cpu.set_reset_address call. 2022-01-07 15:19:23 +01:00
Florent Kermarrec
30cacc19c2 efinix_xyloni_dev_kit: Update SPI Flash. 2022-01-07 15:00:39 +01:00
Florent Kermarrec
16171282c8 digilent_arty/CRG: Add with_rst parameter to be able to easily disable rst.
On Arty, cpu_rst pin is connected to a button but also to USB-UART which also
resets the SoC when USB-UART is connected which is in some case not wanted.

with_rst provides an easy way to disable rst by setting it to False.
2022-01-07 14:12:28 +01:00
enjoy-digital
3ebbebe750
Merge pull request #319 from antmicro/datacenter-updates
antmicro-datacenter updates
2022-01-07 11:03:30 +01:00
Florent Kermarrec
8151bf7ffa targets: Update and simplify SPI-Flash support (Address is now automatically allocated). 2022-01-07 10:34:47 +01:00
Florent Kermarrec
a4130556ac gsd_butterstick: Add optional SYZYGY GPIO (--with-syzygy-gpio) to expose the 32 GPIOs on SYZYGY breakout board. 2022-01-06 18:37:42 +01:00
Karol Gugala
4ae7b5e4ff antmicro_datacenter: extend eth reset 2022-01-06 17:40:44 +01:00
Florent Kermarrec
144c0dc27e digilent_zedboard: +x. 2022-01-06 09:38:19 +01:00
Florent Kermarrec
28cdc8b914 spartan_edge_accelerator: Review/Simplify. 2022-01-06 09:37:46 +01:00
Florent Kermarrec
2c6ce12154 spartan_edge_accelerator: Add seeedstudio prefix and seeedsstudio to vendors list. 2022-01-06 09:06:27 +01:00
enjoy-digital
1ee619a455
Merge pull request #317 from primeshp/spartanacc
Spartan Edge Accelerator Board support
2022-01-06 09:03:02 +01:00
Florent Kermarrec
db9173ad8b targets/alchitry_mojo: Fix build. 2022-01-05 18:11:53 +01:00
Florent Kermarrec
53dc00eab7 targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
Florent Kermarrec
c836b57145 titanium_ti60_f225_dev_kit: Add HyperRAM separator. 2022-01-04 15:18:26 +01:00
Florent Kermarrec
28a6fad705 targets/efinix_titanium_ti60_f225: Defaults to 200MHz clock and increase HyperRam size to 32MB. 2022-01-04 11:25:18 +01:00
Primesh
f5ac5200ff
Added Spartan Edge Accelerator board 2022-01-03 17:14:54 -05:00
Primesh
713ae531f6 Add Spartan Edge Accelerator support 2022-01-03 16:31:13 -05:00
enjoy-digital
059563245d
Merge pull request #314 from sergachev/zedboard
LiteX BIOS on Zedboard
2022-01-03 17:59:22 +01:00
Florent Kermarrec
c9816f2bc1 snicker_doodle: Add z7-10/z7-20 variants support. 2022-01-03 17:15:27 +01:00
Florent Kermarrec
dc61d383e6 snickerdoodle: Rename to krtkl_snicker_doodle and do minor cosmetic changes. 2022-01-03 17:09:17 +01:00
Derek Mulcahy
a118a0e499 Replaced Blinky with LedChaser. 2021-12-24 22:14:18 -05:00
Ilia Sergachev
bc3c42ab5f zedboard: disable soc uart for all variants (zynq does not need it, for soft cpus there are no pins) 2021-12-22 03:28:13 +01:00
Ilia Sergachev
53ce00b3fd zedboard: add target with bios on arm zynq cpu 2021-12-22 03:14:13 +01:00
Derek Mulcahy
154cb672da Removed unused ext_freq parameter. 2021-12-20 21:42:21 -05:00
Derek Mulcahy
81404ff185 Improved PS7 support. Configured external clock. 2021-12-20 21:14:18 -05:00
derekmulcahy
d64207f8b6
Merge branch 'litex-hub:master' into master 2021-12-20 17:35:35 -05:00
enjoy-digital
94b4789286
Merge pull request #312 from trabucayre/arty_z7
adding digilent_arty_z7 support
2021-12-20 21:50:41 +01:00
enjoy-digital
8772190177
Merge pull request #311 from tilk/icesugar_pro
Option --with-spi-flash for iCESugar-Pro
2021-12-20 21:49:26 +01:00
Florent Kermarrec
8664b59f23 targets: Fix --bios-flash-offset support and other minor cleanups. 2021-12-20 21:41:12 +01:00
enjoy-digital
c6303480cb
Merge pull request #308 from hubmartin/tinyfpga_bx
Fix bios-flash-offset for tinyFPGA
2021-12-20 21:29:37 +01:00
Gwenhael Goavec-Merou
bb92bb00a8 adding digilent_arty_z7 support 2021-12-20 18:02:57 +01:00
derekmulcahy
4c76e12932
Merge branch 'litex-hub:master' into master 2021-12-20 10:54:09 -05:00
Marek Materzok
7fb225a162 Option --with-spi-flash for iCESugar-Pro 2021-12-19 15:50:52 +01:00
Franck Jullien
f18c1a033c Efinix: ti60: add HyperRAM support 2021-12-17 10:23:10 +01:00
Derek Mulcahy
1c87c391c4 Initial release for Snickerdoodle 2021-12-14 16:00:42 -05:00
hubmartin
84f267e00c Change bios-flash-offset for tinyFPGA 2021-12-14 19:10:03 +01:00
enjoy-digital
c2a840f777
Merge pull request #307 from fjullien/titanium_spi
Titanium spi
2021-12-14 08:21:15 +01:00
Franck Jullien
9608cae2ee efinix: Ti60f225 change spi_flash module 2021-12-13 23:01:48 +01:00
Franck Jullien
be7dbf3b1b exfinix: efinix_titanium_ti60_f225_dev_kit: fix typo 2021-12-13 22:53:50 +01:00
Florent Kermarrec
179e9090d1 Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets. 2021-12-13 15:54:56 +01:00
Franck Jullien
e84f32b918 efinix: add titanium Ti60 dev kit 2021-12-13 09:37:14 +01:00
enjoy-digital
35e0026875
Merge pull request #303 from sergachev/master
sipeed_tang_nano_4k: add option to build with Gowin EMCU
2021-12-09 14:30:54 +01:00
Ilia Sergachev
14a8c50e97 sipeed_tang_nano_4k: connect Gowin EMCU UART, undo unnecessary changes 2021-12-09 00:17:48 +01:00
Ilia Sergachev
6274c4c425 sipeed_tang_nano_4k: connect Gowin EMCU UART 2021-12-09 00:12:31 +01:00
Ilia Sergachev
13c83ba532 sipeed_tang_nano_4k: add initial Gowin EMCU support 2021-12-08 23:50:14 +01:00
Ilia Sergachev
4287ab561e sipeed_tang_nano_4k: allow non-vexriscv CPUs 2021-12-08 23:33:49 +01:00
enjoy-digital
9119250276
Merge pull request #300 from tilk/de1_soc
Better support for DE1-SoC
2021-12-08 06:18:25 +01:00
enjoy-digital
2b7587632f
Merge pull request #299 from gregdavill/butterstick-updates
Butterstick updates
2021-12-08 06:16:29 +01:00
Florent Kermarrec
8ad89881c2 fairwaves_xtrx: Add pcie_x2 definitions and switch to it. 2021-12-07 15:27:55 +01:00
Marek Materzok
cbeb2a3792 Add LedChaser to DE1-SoC 2021-12-05 20:16:10 +01:00
Greg Davill
fd2ec534a7 butterstick: Add extra pins 2021-12-05 20:33:28 +10:30
Greg Davill
c8a8e943b5 butterstick: add --sdram-device option
Set 64M16 as default sdram-device.

Related to #298
2021-12-04 17:07:06 +10:30
Florent Kermarrec
bf8b23c19f trenz_tec0117: Update target. 2021-12-02 18:23:11 +01:00
enjoy-digital
efa1f46356
Merge pull request #297 from sergachev/master
Fix Sipeed Tang Nano 4k example compilation; adapt Gowin PLL class changes
2021-12-02 09:14:32 +01:00
Ilia Sergachev
666ef9dad3 sipeed_tang_nano_4k: use minimal vexriscv variant to fit into number of BSRAMs 2021-11-29 11:46:32 +01:00
Ilia Sergachev
2fb734a0f2 sipeed_tang_nano*: adapt Gowin PLL changes in litex 2021-11-29 11:45:13 +01:00
Florent Kermarrec
1829693877 fairwaves_xtrx: Integrate ICAP/SPIFlash (for update over PCIe). 2021-11-26 16:18:52 +01:00
enjoy-digital
fe14e16c1b
Merge branch 'master' into tang_primer 2021-11-23 19:04:09 +01:00
Miodrag Milanovic
6954dd25eb Set minimal core, since full does not work for some reason 2021-11-23 15:26:54 +01:00
Miodrag Milanovic
0b7fabb864 FireAnt board support 2021-11-23 14:43:52 +01:00
Miodrag Milanovic
2cc322e65d Add initial support for Tang Primer board 2021-11-22 19:10:11 +01:00
Florent Kermarrec
70c0dbb185 targets/radiona_ulx3s: Remove SDRAM underflows debug pin. 2021-11-22 11:54:18 +01:00
Florent Kermarrec
60b769b624 efinix_trion_t120_bga576_dev_kit/ethernet: Disable software debug (RX now seems to be working fine). 2021-11-16 18:53:15 +01:00
Florent Kermarrec
996f5b2edd efinix_trion_t120_bga576_dev_kit: Enable target1 port and also connect it to SoC. 2021-11-16 18:12:42 +01:00
Florent Kermarrec
7ce6c4cf79 efinix_trion_t120_bga576_dev_kit: Switch to ctrl_type = "none" (Also seems to work fine, avoid ddr_reset_sequencer dependency). 2021-11-16 17:50:47 +01:00
Florent Kermarrec
99f4f97f00 efinix_trion_t120_bga576_dev_kit: Use new InterfaceWriterBlock/InterfaceWriterXMLBlock and move PLL/DRAM blocks definition to target. 2021-11-16 17:41:26 +01:00
Hans Baier
e16fa193fc qmtech 10cl006: remove all options which won't fit into the device. use uartbone as default 2021-11-15 10:23:01 +07:00
Florent Kermarrec
138dc1467e quicklogic_quickfeather: Fix build with GPIOIn when cpu-type=None (IRQ not supported). 2021-11-14 09:30:52 +01:00
Florent Kermarrec
ed67b91fcc quicklogic_quickfeather: Simplify cpu_type switch between None/EOS-S3. 2021-11-14 09:26:29 +01:00
Florent Kermarrec
2d3422869c quicklogic_quickfeather: Update clocking. 2021-11-14 09:19:19 +01:00
Florent Kermarrec
df468fcf85 quicklogic_quickfeather: Avoid add_csr calls (not required). 2021-11-14 08:54:49 +01:00
Florent Kermarrec
06bae58f48 efinix_trion_t120_bga576: Do a bit a of cleanup on LPDDR3 now that working. 2021-11-12 19:43:28 +01:00
Florent Kermarrec
86f6d7e66b efinix_trion_t120_bga576_dev_kit: Remove test command. 2021-11-12 18:06:11 +01:00
Florent Kermarrec
4e03f66fad efinix_trion_t120_bga576_dev_kit: Remove debug, integrate LPDDR3 as done on other targets.
Also lower sys_clk_freq since seems to cause issue with DRAM at 100MHz: Needs to be investigated.
2021-11-12 18:04:30 +01:00
Florent Kermarrec
77fffda9cd efinix_trion_t120_bga576_dev_kit: Switch to UARTBone, Add LiteScope on Pseudo-AXI, fix addressing and do first successful LPDDR3 accesses :) 2021-11-12 16:41:42 +01:00
Gwenhael Goavec-Merou
648d38da7e quicklogic_quickfeather: add button and GPIOIn
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2021-11-12 13:21:00 +01:00
Florent Kermarrec
b6c5a85b98 Add initial Efinix Trion T20 MIPI Dev Kit support: CPU, ROM, RAM, UART and SPI Flash.
Tested with:
./efinix_trion_t20_mipi_dev_kit.py --with-spi-flash --build --load
        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Nov 12 2021 08:37:48
 BIOS CRC passed (2bec12a3)

 Migen git sha1: 7507a2b
 LiteX git sha1: f679992f

--=============== SoC ==================--
CPU:		VexRiscv @ 100MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
FLASH:		4096KiB

--========== Initialization ============--

Initializing W25Q32JV SPI Flash @0x00400000...
Enabling Quad mode...
First SPI Flash block erased, unable to perform freq test.
Memspeed at 0x400000 (Sequential, 4.0KiB)...
   Read speed: 2.6MiB/s
Memspeed at 0x400000 (Random, 4.0KiB)...
   Read speed: 1.5MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
2021-11-12 08:42:10 +01:00
Florent Kermarrec
d6fc4b412e efinix_trion_t120/t20_dev_kit: Switch back to 100MHz (now that timings constraints are correctly applied). 2021-11-12 07:58:51 +01:00
Florent Kermarrec
7ce8567d9b targets/efinix: Bitstreams now directly generated to gateware directory. 2021-11-11 11:19:39 +01:00
Florent Kermarrec
855fd7e3d7 efinix_trion_t120_bga576_dev_kit: Continue LPDDR3 integration... 2021-11-10 19:40:35 +01:00
Florent Kermarrec
224f527baa efinix_trion_t120_bga576_dev_kit: Go a bit further in DRAM integration. 2021-11-10 12:07:30 +01:00
Gwenhael Goavec-Merou
040e7b3104 quicklogic_quickfeather: Use initial EOS-S3 support/integration. 2021-11-09 18:59:37 +01:00
Florent Kermarrec
8ce83ce92f efinix_trion_t120_bga576_dev_kit: Add inital LPDDR3 integration (not yet working). 2021-11-09 16:13:40 +01:00
Florent Kermarrec
9a7e5f40b4 efinix_trion_t120_bga576_dev_kit: Add Ethernet/Etherbone support.
Still not fully validated: TX seems OK but RX seems shifted/corrupted.
2021-11-09 11:32:32 +01:00
Florent Kermarrec
ccebae6f55 targets/hyperram: Update integration. 2021-11-08 16:39:49 +01:00
Florent Kermarrec
184f41e61a sipeed_tang_nano: Use PLL and 48MHz sys_clk, switch to SoCMini, add UARTBone (at 1MBauds).
Working correctly on hardware with updated CH552 firmware & patched litex_server...
2021-11-08 09:23:44 +01:00
Hans Baier
d6bf2fd00e terasic_sockit: Use standard SDRAM module from litedram 2021-11-08 12:48:03 +07:00
Hans Baier
a9847f15a7 qmtech_5cefa2: tuned the clock phase shift to be able to run the system at 105MHz 2021-11-06 09:58:10 +07:00
Hans Baier
b2813cfb70 use the right DRAM chip for the QMTech Altera boards 2021-11-06 08:45:03 +07:00
Florent Kermarrec
6e7c76b71e fairwaves_xtrx: Add clk60 (from USB PHY) as default Clk when no PCIe.
Fixes CI.
2021-11-05 15:22:55 +01:00
Florent Kermarrec
ceaaf67dfd Add initial Fairwaves XTRX support (SoC with JTAG-UART and PCIe Gen2 X1). 2021-11-05 14:52:45 +01:00
enjoy-digital
01463a81a4
Merge pull request #287 from hansfbaier/qmtech-fixes
10cl006: add missing spiflash option
2021-11-05 07:11:27 +01:00
Hans Baier
3a25af1c28 10cl006: add missing spiflash option 2021-11-05 09:57:04 +07:00
Hans Baier
0edce3a176 Add support for QMTech 5CEFA2 board (Cyclone V) 2021-11-05 09:53:25 +07:00
Florent Kermarrec
a482d7f6de targets/qmtech_xc7a35t: Use gpio_serial as serial when not mounted on daughterboard. 2021-11-04 18:52:36 +01:00
Florent Kermarrec
9543b5efae marble/marble_mini: Add berkeleylab prefix. 2021-11-04 18:42:16 +01:00
Florent Kermarrec
5e5ae880a4 targets/litex_acorn_baseboard: Integrate WS2812/NeoPixel.
Tested with:
./litex_acorn_baseboard.py --cpu-type=None --uart-name=uartbone --with-ws2812 --build --csr-csv=csr.csv --load
litex_server --uart --uart-port=/dev/ttyUSBX
And test script: https://gist.github.com/enjoy-digital/c32c679a9ee4429d7f38a5ca5016a45a
2021-11-04 16:36:25 +01:00
enjoy-digital
808befec3b
Merge pull request #283 from yetifrisstlama/master
add Marble-board platform and target file
2021-11-04 15:20:11 +01:00
Hans Baier
7aa639ac0f QMTech boards: fix swapped RX/TX lines, remove double uart replacer 2021-11-02 09:34:25 +07:00
Michael Betz
e645eb243b add marble board platform and target file 2021-10-28 18:41:22 +02:00
Florent Kermarrec
207afb98fc ego1: Switch to VideoTerminal (LiteVideo is no longer provided by default with LiteX). 2021-10-27 16:29:46 +02:00
Florent Kermarrec
91818bc5f0 targets/gsd_butterstick/BaseSoC: Set default device to 85F (consistency with default arguments). 2021-10-26 17:01:55 +02:00
Florent Kermarrec
c7a91f9eab efinix: Enable identifier on SoC (issue fixed in LiteX). 2021-10-25 19:33:49 +02:00
Florent Kermarrec
4bcfde8882 efinix: Avoid no_we on ROM/RAMs (no longer required). 2021-10-25 19:10:03 +02:00
Florent Kermarrec
d13a8d54b8 efinix_trion_txy_dev_kit: Lower sys_clk_freq for now to 50MHz, enable QSPI on T120 BGA576 dev kit.
Now possible with recent LiteX changes to support Tristate IOs.
2021-10-25 18:35:35 +02:00
Florent Kermarrec
f230eaf9bc efinix_trion_t120_bga576: Add Tristate test code. 2021-10-25 15:01:34 +02:00
Florent Kermarrec
0ac0f9e75d efinix_xyloni_dev_kit: Switch to openFPGALoader to load bitstream. 2021-10-25 12:49:48 +02:00
Florent Kermarrec
fc05379929 efinix_xyloni_dev_kit: Use PLL. 2021-10-25 12:16:47 +02:00
Florent Kermarrec
394ea23b99 efinix_xyloni_dev_kit: Only force variant to minimal for Vexriscv. 2021-10-22 14:47:12 +02:00
Florent Kermarrec
75fd276dbe efinix_xyloni_dev_kit: Increase similarities with others boards and make target very similar to iceBreaker/Fomu/TangNano4k. 2021-10-21 11:34:55 +02:00
Florent Kermarrec
dc1328f1a5 efinix_xyloni_dev_kit: Fix copyrights. 2021-10-21 10:12:46 +02:00
Florent Kermarrec
012c1d9705 efinix_trion_t20: Minor changes (move serial to platform, fix platform copyright). 2021-10-21 10:10:35 +02:00
enjoy-digital
0cf9793be5
Merge pull request #282 from AndrewD/master
efinix: xyloni dev board basic support
2021-10-21 10:06:25 +02:00
Florent Kermarrec
7525132907 litex_acorn_baseboard/video: Switch to 800x600@60Hz. 2021-10-19 16:34:28 +02:00
Andrew Dennison
c548b1c1e2 efinix: xyloni dev board basic support
* This works: efinix_xyloni_dev_kit.py --cpu-type None --build --load --flash
* issues with SPIflash - wrong generation for tristates miso mosi for
  some reason
2021-10-19 11:23:29 +11:00
enjoy-digital
a53f17380f
Merge pull request #271 from antmicro/add-data-center-board
WIP: boards: added datacenter DDR4 RDIMM tester board
2021-10-18 13:36:37 +02:00
enjoy-digital
a4d330dd2c
Merge pull request #279 from mmicko/efinix_t20_flash
Enable writing to flash for T20
2021-10-15 18:38:08 +02:00
Florent Kermarrec
3730d96709 litex_acorn_baseboard: Add SPIFlash support. 2021-10-15 18:22:08 +02:00
Miodrag Milanovic
1f65d37121 Enable writing to flash for T20 2021-10-15 16:44:35 +02:00
Miodrag Milanovic
d9638c40b8 Initial support for Efinix Trion T20 BGA256 Dev Kit 2021-10-15 12:26:15 +02:00
Florent Kermarrec
914e330a86 efinix_trion_t120_bga576_dev_kit: Add Flash support (Through openFPGALoader). 2021-10-15 09:38:43 +02:00
Florent Kermarrec
195bf176cf efinix_trion_t120_bga576: Add SPIFlash support (X1 for now). 2021-10-14 19:16:01 +02:00
Florent Kermarrec
03c34e31cd efinix_trion_t120_bga576: Add PLL to CRG and increase default sys_clk to 100MHz. 2021-10-14 15:45:26 +02:00
Florent Kermarrec
2ea803b7d1 efinix_trion_t120_bga576: Set no_we on integrated_main_ram.
To allow --integrated-main-ram-size use.
2021-10-14 10:19:18 +02:00
Florent Kermarrec
430918756d efinix_trion_t120_bga576: Add PMODs connectors and use USB-UART/PMOD_E as Serial. 2021-10-14 10:10:42 +02:00
Florent Kermarrec
36897f4646 efinix_trion_t120_bga576: Disable Identifier (crashes design) and move no_we, working.
./efinix_trion_t120_bga576_dev_kit.py --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS CRC passed (b23a7321)

 Migen git sha1: 7507a2b
 LiteX git sha1: 8316fbf1

--=============== SoC ==================--
CPU:		VexRiscv @ 40MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
2021-10-14 09:39:54 +02:00
Florent Kermarrec
ad773b6f2f efinix_trion_t120_bga576: Fix argparse description. 2021-10-13 17:28:43 +02:00
Florent Kermarrec
6c17d76a92 targets/efinix_trion_t120_bga576: Switch to SoCCore (with CPU) and use button as reset (and AsyncResetSynchronizer). 2021-10-13 16:35:14 +02:00
Florent Kermarrec
a4d178a740 Add Efinix Trio T120 BGA576 Dev-Kit initial support (LedChaser). 2021-10-13 12:29:53 +02:00
Florent Kermarrec
83e64fbd64 targets/qmtech_10cl006: +x. 2021-10-13 12:16:41 +02:00
Florent Kermarrec
e29bcd30a6 litex_acorn_baseboard: Add some M2 signals and set devslp to 0. 2021-10-12 11:54:17 +02:00
Florent Kermarrec
a365362f5d Rename litex_m2_baseboard to litex_acorn_baseboard and add link to repository. 2021-10-11 18:36:12 +02:00