52ff93a194
Merge pull request #409 from antmicro/rrozak/remove-dm-pins-from-datacenter
...
Remove DM signals assignment from DDR4 Datacenter platform
2022-07-11 19:34:19 +02:00
2357212161
Remove DM signals assignment from DDR4 Datacenter platform
...
Data Masks (DM) are unsupported on x4 devices and wrong pins were assigned.
Signed-off-by: Ryszard Różak <rrozak@antmicro.com>
2022-07-11 12:29:02 +02:00
3ecec8cd16
Merge branch 'litex-hub:master' into master
2022-07-08 16:59:55 +02:00
756d019571
add support for schoko
2022-07-08 16:58:55 +02:00
6b02ea024a
ti60_f225_dev_kit: Fix ethernet build and enable debug. Now needs testing.
2022-06-28 19:54:00 +02:00
c14611b07c
ti60_f225_dev_kit: Add dummy 0 pin to connectors to use schematic numbering (1-40).
2022-06-27 19:47:19 +02:00
1ad2022138
quicklogic_quickfeather: Move from deprecated Symbiflow to F4PGA
2022-06-17 17:00:48 +02:00
29b72fac7e
taobao_a_e115fb: Minor cleanups.
2022-06-15 11:55:22 +02:00
0ae1417eb5
a_e115fb: Add taobao prefix (Similar to what we do on aliexpress's boards from unknown vendors).
2022-06-15 11:53:11 +02:00
4e0e381f47
Merge pull request #398 from Icenowy/a-e115fb
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a_e115fb: new board
2022-06-15 11:37:36 +02:00
13fbcbb159
a_e115fb: new board
...
It's a core board with EP4CE115 by a random vendor on Taobao.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-06-13 23:13:29 +08:00
c420429a3c
efinix_ti60_f225: Add the 3 QSE connectors and add RGMII Ethernet QSE extension board.
2022-06-13 16:01:28 +02:00
d37af4aece
Merge pull request #395 from AEW2015/master
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Support for "discontinued" Avnet aes-ku040-db-g development board
2022-06-07 12:13:47 +02:00
313e758ffe
Updated copywrite and renamed to avnet_aesku40
2022-06-03 20:49:52 -06:00
6e33d9249f
sipeed_tang_primer_20k: Cleanup/Fix.
2022-06-03 11:40:10 +02:00
68733c6e92
Merge pull request #396 from Icenowy/tang20k
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sipeed_tang_primer_20k: new board
2022-06-03 10:14:55 +02:00
b97d9cd9e8
sipeed_tang_primer_20k: new board
...
Only initial support is added.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-06-03 00:24:20 +08:00
4d98dd38a7
Merge branch 'litex-hub:master' into master
2022-06-01 23:01:43 -06:00
1b96067113
added aesku40 dev board
2022-06-01 22:54:03 -06:00
48353735fa
Merge pull request #393 from swetland/ethernet
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muselab icesugar pro: add ethernet/etherbone support
2022-05-20 22:10:02 +02:00
5a714167ed
muselab icesugar pro: add ethernet/etherbone support
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- use P4 header for a waveshare ethernet phy module
- add --with-ethernet, --with-etherbone, --eth-ip, and --eth-dynamic-ip
target configuration options
2022-05-19 14:46:09 -07:00
2214c7baec
enclustra_mercury_kx2: remove useless clk100, because it is not connected to a clock pin
2022-05-20 04:42:06 +07:00
f1e021cbbe
enclustra_mercury_kx2: add clk100, leds, base board serial, DDR3 termination, DDR3 voltage setting
2022-05-19 15:41:44 +07:00
64773b4085
Merge pull request #390 from hansfbaier/hpc-xc7k420t
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HPC Store xc7k420t
2022-05-16 11:20:15 +02:00
efa5740811
Move HDMI Support From Sipeed Tang Nano 4K.
2022-05-15 10:53:09 +08:00
26c0f546c7
Merge branch 'litex-hub:master' into hpc-xc7k420t
2022-05-14 21:40:12 +07:00
006b54e7ea
Get 3 DDR modules working with Vivado
2022-05-14 21:38:25 +07:00
ee58e5dbc7
Merge pull request #388 from swetland/hdmi
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muselab: icesugarpro: fix HDMI output
2022-05-12 15:09:03 +02:00
f383ad3938
Support HPC Store XC7K420T board
2022-05-12 12:55:46 +07:00
d1096a2cd0
Add HPC Store XC7K420T board
2022-05-11 08:58:50 +07:00
0ce7f8354c
Add initial LimeSDR Mini V2 support (With SoC + USB3 (FT245PHYSynchronous)).
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python3 -m litex_boards.targets.limesdr_mini_v2 --csr-csv=csr.csv --build --load
litex_server --jtag --jtag-config=openocd_limesdr_mini_v2.cfg
litex_term crossover
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2022 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on May 3 2022 18:59:46
BIOS CRC passed (5f29afcc)
LiteX git sha1: a4cc859d
--=============== SoC ==================--
CPU: VexRiscv @ 80MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 128KiB
SRAM: 8KiB
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex> ident
Ident: LiteX SoC on LimeSDR-Mini-V2 2022-05-03 18:59:29
2022-05-03 19:04:06 +02:00
ec220e4b5b
muselab: icesugarpro: fix HDMI output
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- enable data_n outputs
- use drive_both property of updated VideoHDMIPHY to drive both
differential outputs
- adjust default clocking to successfully close timing
(sysclk at 50Mhz, HDMI at 25MHz, HDMIx5 at 125MHz)
2022-05-03 04:04:26 -07:00
3ebc9877ad
1bitsquared_icebreaker: Rename to icebreaker (Python does not like number as prefix for imports).
2022-05-02 13:20:40 +02:00
9914478854
xilinx_ac701: Add SPI-Flash support.
2022-04-28 11:05:51 +02:00
ae8bdb74a9
xilinx_kc705: Add SPI-Flash support.
2022-04-28 10:27:54 +02:00
68ea5fe057
platforms/colorlight_5a_75b/v7_0: Comment rst_n to avoid deadlock on reboot command.
2022-04-25 18:50:17 +02:00
39a314cdae
Rename aliexpress_u420t to aliexpress_xc7k420t.
2022-04-21 14:28:26 +02:00
06396a2cb6
Merge pull request #384 from hansfbaier/qmtech-ep4cgx150
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add board support for QMTech EP4CGX150
2022-04-21 10:36:51 +02:00
b2a346edc8
aliexpress_u420t: Review/Simplify.
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Specific integrated ROM/SRAM/MAIN_RAM size can be passed through command line parameters.
2022-04-21 10:32:18 +02:00
3e9e970076
Add aliexpress prefix to boards from aliexpress that seem to be from the same unknown vendor.
2022-04-21 10:06:11 +02:00
8c51cb12c8
Merge pull request #383 from sysmanalex/master
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Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board
2022-04-21 10:02:05 +02:00
b41d72e1d0
add board support for QMTech EP4CGX150
2022-04-16 06:36:24 +07:00
23b1b15486
Add initial/minimal Pluto SDR support.
2022-04-14 12:13:03 +02:00
1e00a43fdd
board u420t kintex update v0.2
2022-04-13 00:12:59 +03:00
89570b005c
Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board
2022-04-12 22:38:14 +03:00
b99d788732
fairwaves/xtrx: Update with xtrx_julia improvements.
2022-04-12 17:42:52 +02:00
dd27a3473b
platforms: Add LambdaConcept's PCIe Screamer/M2.
2022-04-01 11:41:07 +02:00
867489d855
xilinx_zcu106: Add PCIe Gen3 X4 support.
2022-04-01 10:01:06 +02:00
299d4d66d6
efinix: ti60f225 add MIPI RX
2022-03-29 15:29:59 +02:00
13e5062793
Merge pull request #379 from chmousset/add_t8_devkit
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[enh] added efinix t8f81 dev kit
2022-03-28 14:58:21 +02:00
e6a9f44580
Merge pull request #378 from antmicro/add-missing-peripherals
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DDR4 datacenter: add missing peripherals
2022-03-28 14:40:22 +02:00
83d7c3fb39
Merge pull request #377 from Johnsel/arduino_mkrvidor4000
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Board support for Arduino MKR Vidor 4000
2022-03-28 14:34:59 +02:00
7a68dcc79b
[enh] added efinix t8f81 dev kit
2022-03-26 09:52:20 +01:00
33516a40f4
antmicro_datacenter: add missing peripherals
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-25 13:49:41 +01:00
77cb866233
antmicro_datacenter: add HDMI output
...
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-25 10:03:07 +01:00
501c50ff79
Fixed serial port comments hinting the correct pins.
2022-03-24 08:04:47 -07:00
901942bda6
Cleanup for pushing. This commit combined with my litedram fork produces a running basic SoC + bios --=============== SoC ==================--
...
CPU:BUS:E 32-bit @ 4GiB
CSR:16-bit @ 48MT/s (CL-2 CWL-2)
--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
Write: 0x40000000-0x40200000 2.0MiB
Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
Write speed: 13.6MiB/s
Read speed: 21.3MiB/s
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
2022-03-24 07:39:14 -07:00
e445c9ec71
qmtech_5cefa2: make serial pins consistent with other boards
2022-03-24 18:52:28 +07:00
bcedf573e0
adi_adrv2crr: Add IO definition for the AD9545 reset line
...
We use PULLUP on it so that the AD9545 is by default held out
of reset without the user having to do anything ...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-23 20:42:30 +01:00
cdb78efd3c
adi_adrv2crr: Document I2C devices attached
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-23 20:42:30 +01:00
6c31f16df2
adi_adrv2crr: Fix I2C signal assignement
...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-23 20:42:30 +01:00
73458ae9d7
decklink_quad_hdmi_recorder: Add Serial/UART pins.
2022-03-23 11:08:51 +01:00
d399f33dda
Merge pull request #374 from smunaut/adrv2crr
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adi_adrv2crr: Upgrade part to speedgrade 2
2022-03-23 09:09:57 +01:00
dc92584681
adi_adrv2crr: Upgrade part to speedgrade 2
...
Even though the schematic and bom call for speedgrade 1, this was only for
the prototypes.
All productions units have been updated to speedgrade 2.
See this thread:
https://ez.analog.com/fpga/f/q-a/112356/adrv9009-zu11eg-speed-grade
And the official HDL project for the board:
https://github.com/analogdevicesinc/hdl/blob/master/projects/adrv9009zu11eg/adrv2crr_fmc/system_project.tcl#L16
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-22 23:36:41 +01:00
68c23e9251
faster sdcard boot on 2.0
2022-03-22 17:54:12 +01:00
b8b0aead28
Added basic support for Arduino MKR Vidor 4000
2022-03-21 18:54:29 -07:00
3ebad7f7cc
gsd_orangecrab/butterstick: Add assert on devices.
2022-03-18 10:44:21 +01:00
9faa805ab9
alinx_ax7010: Review/Cleanup.
2022-03-17 11:31:02 +01:00
3aa1042f5f
Merge pull request #367 from ggangliu/zynq_xc7z010
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Add ALINX AX7010 board support
2022-03-17 09:52:04 +01:00
0f82db26da
rcs_artic_term_bmc_card: Fix is -> ==.
2022-03-17 09:45:47 +01:00
0e7145b4a1
Update and rename xilinx_alinx_ax7010.py to alinx_ax7010.py
2022-03-17 11:21:42 +08:00
0745162a29
xilinx_zcu102: Review/Cleanup for consistency with others boards.
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Also remove INTERNAL_VREF constraints that are not yet useful (required for DRAM).
2022-03-16 18:47:05 +01:00
f4a48e51d7
add xilinx_zcu102 platform
2022-03-16 15:37:02 +01:00
5365c7fce4
Rename xilinx_zynq_xc7z010.py to xilinx_alinx_ax7010.py
2022-03-15 15:50:09 +08:00
4159faf48b
Add files via upload
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Adding zynq_xc7z010 board support
2022-03-12 12:20:54 +08:00
688377de7c
lpddr4_test_board: Fix button pin
2022-03-11 15:59:43 +01:00
3b74673a93
Merge pull request #363 from curliph/master
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add Gowin programmer support
2022-03-08 17:26:50 +01:00
f52a915487
lambdaconcept_ecpix5: Add initial Video support at 640x480 (with Terminal/Framebuffer).
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I2C intialization code adapted from https://github.com/ultraembedded/ecpix-5 .
Tested with:
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-terminal --build --load
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-framebuffer --build --load
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2022 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Mar 8 2022 15:34:22
BIOS CRC passed (c7fe9ecd)
Migen git sha1: ac70301
LiteX git sha1: 7ebc7625
--=============== SoC ==================--
CPU: FireV-STANDARD @ 75MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 128KiB
SRAM: 8KiB
L2: 8KiB
SDRAM: 524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)
--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
m0, b00: |01110000| delays: 02+-01
m0, b01: |00000000| delays: -
m0, b02: |00000000| delays: -
m0, b03: |00000000| delays: -
best: m0, b00 delays: 02+-01
m1, b00: |01110000| delays: 02+-01
m1, b01: |00000000| delays: -
m1, b02: |00000000| delays: -
m1, b03: |00000000| delays: -
best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
Write: 0x40000000-0x40200000 2.0MiB
Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
Write speed: 13.6MiB/s
Read speed: 23.4MiB/s
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex> ident
Ident: LiteX SoC on ECPIX-5 2022-03-08 15:34:19
2022-03-08 15:40:52 +01:00
6eb906a2ca
Update sipeed_tang_nano_9k.py
...
add Gowin programmer support
2022-03-08 14:00:53 +08:00
4c9bc53a3c
add Win/powershell and WSL support
2022-03-08 13:24:56 +08:00
cadfde4d39
litex_acorn_baseboard: Add SerDes refclk and m2_tx/rx pins.
2022-03-07 18:41:53 +01:00
50cc75fd56
Merge pull request #361 from smunaut/adrv2crr
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adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM
2022-03-07 09:24:36 +01:00
37783ff9fd
colorlight_5a_75e: Fix _connectors_v6_0/j16 first pin (thanks @WhichWayWazzit).
2022-03-07 09:16:07 +01:00
ec28ca8fa3
adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM
...
This is a carrier board with a SoM mounted on it.
There is also an FMC connector that can accept another
AD-FMCOMMS8-EBZ to get two more ADRV9009 RFIC but support for
that is not added yet.
Note that the PCIe support requires :
- Change the .xci in the litepcie to use the right Quad
- Revert litex 3c34039b731b42e27e2ee6c8e399e5eb8f3a058f so the
timing constrainst of litepcie apply correctly
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-03 22:17:09 +01:00
7933e9462e
antmicro_datacenter: fix i2c pads assignment
...
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-01 16:35:15 +01:00
7a5fe4c221
efinix_titanium_ti60_f225_dev_kit: Update iobank_info with the values used in the video example design.
2022-03-01 14:01:43 +01:00
db2d83ea29
antmicro_datacenter: use 100 MHz and add i2c master
...
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-01 13:00:36 +01:00
d6fddc746f
antmicro_datacenter: use single rank configuration
2022-03-01 12:43:08 +01:00
37905d1f34
antmicro_datacenter: use correct DQS pins
2022-03-01 12:43:08 +01:00
73b5143cec
antmicro_datacenter: add DCI_CASCADE
...
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2022-03-01 12:43:08 +01:00
0ceb15938f
digilent_arty_z7: Remove fake serial.
2022-03-01 11:05:59 +01:00
673676e3cb
digilent_arty_a7: Switch to VivadoProgrammer.
2022-03-01 10:48:22 +01:00
e16e5e0591
digilent_arty_z7: Fix add_period_constraint.
2022-03-01 10:30:14 +01:00
c9d009c735
Add ColorLight i9 v7.2
2022-02-28 14:08:49 +00:00
11dfe225fa
Merge pull request #356 from fjullien/add_mipi_tx
...
efinix: add MIPI TX to platform Ti60
2022-02-25 16:53:11 +01:00
c54e92c47d
efinix: add MIPI TX to platform Ti60
2022-02-25 15:15:14 +01:00
2311db18f8
add initial support for kröte fpga board
2022-02-25 14:22:19 +01:00
b1550f006a
stlv3225: Minor Review/Cleanup, switch to JTAG HS2 programmer.
2022-02-24 17:17:08 +01:00
174d958ca7
Initial support for STLV7325 Kintex-7 board.
2022-02-23 18:28:55 +01:00
6661947d96
Merge pull request #354 from madscientist159/master
...
Add initial support for RCS Arctic Tern boards
2022-02-23 18:06:08 +01:00
ae4b3c0938
Add initial support for RCS Arctic Tern boards
2022-02-21 20:04:51 -06:00
85397818d9
add Xilinx ZCU216 support
2022-02-21 19:14:13 +01:00
7d84e6e863
efinix_titanium_ti60_t225: Add SPI/Native SDCard support.
...
Both modes working with 8559b88ad8
2022-02-21 10:35:06 +01:00
08a79fa3ac
lattice_ecp5_vip: Minor cleanups, fix CI.
2022-02-15 10:58:38 +01:00
30afe26669
Merge pull request #348 from hubmartin/ecp5-vip
...
Draft: Add Lattice ECP5 VIP board + HDMI output board support
2022-02-15 08:53:57 +01:00
896884dd21
Merge branch 'master' into axu2cga_software
2022-02-15 08:21:29 +01:00
3f58df9974
platforms/targets: Fix typos.
2022-02-14 17:26:46 +01:00
b53b79821e
platforms: Expose toolchain parameter on all platforms to ease switching to alternative/open-source toolchains.
2022-02-14 11:35:18 +01:00
12b91eccdc
digilent_arty: Remove yosys+nextpnr INTERNAL_VREF constraint skip (now directly done in LiteX).
2022-02-14 10:45:29 +01:00
50654f1b7b
platforms/alinx_axu2cga: add zynqmp PS configuration params
2022-02-12 18:19:55 +01:00
27b03df886
Add Lattice ECP5 VIP board + HDMI output board support
2022-02-08 21:47:58 +01:00
5d52bc5461
Fix seven_seg pin assignment in DE1-SoC
...
Fixes quartus build error:
```
Error (171016): Can't place node "seven_seg5[6]" -- illegal location assignment PIN_AA2 File: /home/arusekk/src/fpga-proj/build/de1soc/gateware/de1soc.v Line: 49
```
2022-02-08 09:03:53 +01:00
18e8bec9d4
xilinx/kv260: Minor cleanup and add Build/Use instructions (from PR).
2022-02-07 08:12:43 +01:00
1d8c3789af
add Xilinx KV260 support
2022-02-06 14:38:57 +01:00
7f4d464f1b
trellisboard: Add Video Terminal/Framebuffer support and use new I2C init feature to automatically configure TP410 at startup.
2022-02-02 09:52:12 +01:00
fbd424fc48
DECA: Add Ethernet and Etherbone support
...
Also fixed pcf_en IO standard compared to golden Arrow project.
2022-01-29 15:15:53 -08:00
dd134a4b7d
digilent arty z7: allows toolchain selection (PL only)
2022-01-26 07:30:06 +01:00
537f04a13d
alinx_axu2gca: new board
...
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2022-01-25 07:35:42 +01:00
db77ea5c7a
Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 02:06:34 -03:00
787f44e7d9
Merge pull request #336 from tcal-x/cmod-a7-flash
...
Digilent CMOD A7: add flash support.
2022-01-23 08:36:49 +01:00
6567af6f49
Digilent CMOD A7: add flash support.
...
Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.
Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-22 18:50:12 -08:00
f533e7f8ba
sipeed_tang_nano_9k: enable copackaged PSRAM
...
Also enable SPI SDCard which was pending by the lack of main_ram
previously.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-23 03:37:03 +08:00
e35b9b439f
platforms/sipeed_tang_nano_9k: Fix copyrights and remove board diagram/description of the 4k.
2022-01-22 15:55:36 +01:00
999dbd572f
Merge pull request #334 from Icenowy/tang9k
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sipeed_tang_nano_9k: new board
2022-01-22 15:49:08 +01:00
e699c377a5
sipeed_tang_nano_9k: new board
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-22 11:45:49 +08:00
e9d4d9066a
xilinx_zcu106: add DDR4 interface and fix reset error
2022-01-22 03:08:21 +08:00
e0c4c0fe39
Add openocd programmer for Digilent CMOD A7.
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Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-20 20:54:03 -08:00
834125e978
platforms/digilent_nexys_video: add missing CD pin
2022-01-17 17:11:40 -05:00
73b47e9394
Merge pull request #324 from RobertWilbrandt/arrow_usb_blaster
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Use Arrow-USB-Blaster for trenz c10lprefkit
2022-01-17 08:47:47 +01:00
b240c381a7
colorlight_5a_75b: Comment out eth's rst_n (Prevent CPU boot).
2022-01-17 08:30:10 +01:00
b33deba2ed
platforms: Remove useless symbiflow import.
2022-01-17 08:25:00 +01:00
00c9cf1d6e
Use Arrow-USB-Blaster for trenz c10lprefkit
2022-01-16 18:03:40 +01:00
38bff921b2
Fixup.
2022-01-16 13:00:46 +01:00
bccbd95526
digilent_cmod_a7: Propagate variant and toolchain
2022-01-16 11:31:08 +01:00
296c99f065
digilent_pynq_z1: Do minor cosmetic cleanups.
2022-01-14 09:39:42 +01:00
45cfe2be6b
qmtech_ecp4ce15/ecp4ce55: Merge in qmtech_ecp4cex5.
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Defaults to ecp4ce15, ecp4ce55 can be selected with --variant=ecp4ce55.
2022-01-14 09:33:29 +01:00
830757502f
Merge pull request #321 from r4d10n/master
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Support for Digilent Pynq Z1
2022-01-14 08:48:26 +01:00
e489c3e3de
Change Serial port to pmoda:0/1
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Remove usb_uart. Copyright notice update.
2022-01-13 23:24:50 +05:30
e27d49114f
Add initial and minimal ZCU106 support (with Clk/Leds/UART).
2022-01-13 17:40:03 +01:00
bd95ce5e47
Create digilent_pynq_z1.py
2022-01-11 19:31:33 +05:30
c57ea732dd
Added QMTech EP4CE55 board - almost identical to EP4CE15 board but bigger FPGA.
2022-01-07 19:27:40 +00:00
3ebbebe750
Merge pull request #319 from antmicro/datacenter-updates
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antmicro-datacenter updates
2022-01-07 11:03:30 +01:00
a4130556ac
gsd_butterstick: Add optional SYZYGY GPIO (--with-syzygy-gpio) to expose the 32 GPIOs on SYZYGY breakout board.
2022-01-06 18:37:42 +01:00
86b9b1b56c
antmicro_datacenter: fix clock pin LOC
2022-01-06 17:38:49 +01:00
28cdc8b914
spartan_edge_accelerator: Review/Simplify.
2022-01-06 09:37:46 +01:00
2c6ce12154
spartan_edge_accelerator: Add seeedstudio prefix and seeedsstudio to vendors list.
2022-01-06 09:06:27 +01:00
1ee619a455
Merge pull request #317 from primeshp/spartanacc
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Spartan Edge Accelerator Board support
2022-01-06 09:03:02 +01:00
6b0bd4da4d
fix(vc707): fix 'dat' typo
2022-01-05 20:02:07 -08:00
9ad1723ac1
efinix_titanium_ti60_f225_dev_kit: Cleanup HyperRAM IOs.
2022-01-04 15:52:42 +01:00
713ae531f6
Add Spartan Edge Accelerator support
2022-01-03 16:31:13 -05:00
059563245d
Merge pull request #314 from sergachev/zedboard
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LiteX BIOS on Zedboard
2022-01-03 17:59:22 +01:00
c9816f2bc1
snicker_doodle: Add z7-10/z7-20 variants support.
2022-01-03 17:15:27 +01:00
dc61d383e6
snickerdoodle: Rename to krtkl_snicker_doodle and do minor cosmetic changes.
2022-01-03 17:09:17 +01:00
b48d96c40d
Merge pull request #309 from derekmulcahy/master
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Initial release for Snickerdoodle
2022-01-03 16:46:14 +01:00
fae2cecf93
Merge pull request #315 from hubmartin/master
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Fix cannot find board 'littlebee'
2022-01-03 16:09:12 +01:00
3dd85d9afb
Merge pull request #313 from fjullien/add_io_to_t120
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efinix: add clock pins to t120 bga576 platform
2022-01-03 16:07:54 +01:00
064406e2f6
Merge branch 'master' of github.com:hubmartin/litex-boards
2021-12-27 21:08:13 +01:00
b98d76ff39
Fix cannot find board bug
2021-12-27 21:07:16 +01:00
2a6282273f
Merge branch 'litex-hub:master' into master
2021-12-24 22:19:33 -05:00
b5008a2d5c
platforms/radiona_ulx3s: Use specific GPDI mapping for 1.7/2.0 revision.
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Data channels 0/2 are swapped between revisions.
2021-12-23 10:39:58 +01:00
43a1e13b53
zedboard: compress bitstream, derive default clk f
2021-12-22 03:13:30 +01:00
166451e65e
zedboard: remove fake serial
2021-12-22 03:12:48 +01:00
379745b039
efinix: add clock pins to t120 bga576 platform
2021-12-21 12:34:19 +01:00
15ea01197d
Added placeholder clk/led/uart.
2021-12-20 21:12:46 -05:00
d64207f8b6
Merge branch 'litex-hub:master' into master
2021-12-20 17:35:35 -05:00
bb92bb00a8
adding digilent_arty_z7 support
2021-12-20 18:02:57 +01:00
4c76e12932
Merge branch 'litex-hub:master' into master
2021-12-20 10:54:09 -05:00
f18c1a033c
Efinix: ti60: add HyperRAM support
2021-12-17 10:23:10 +01:00
1c87c391c4
Initial release for Snickerdoodle
2021-12-14 16:00:42 -05:00
179e9090d1
Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets.
2021-12-13 15:54:56 +01:00
4a9828c506
Merge pull request #305 from fjullien/efinix_titanium
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efinix: add titanium Ti60 dev kit
2021-12-13 15:45:55 +01:00
e84f32b918
efinix: add titanium Ti60 dev kit
2021-12-13 09:37:14 +01:00
2df10f278f
platforms/redpitaya: fix DAC pins
2021-12-12 15:55:31 +01:00
338abb4e0c
efinix: add bank voltage configuration to platforms
2021-12-08 18:10:22 +01:00
9119250276
Merge pull request #300 from tilk/de1_soc
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Better support for DE1-SoC
2021-12-08 06:18:25 +01:00
2b7587632f
Merge pull request #299 from gregdavill/butterstick-updates
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Butterstick updates
2021-12-08 06:16:29 +01:00
8ad89881c2
fairwaves_xtrx: Add pcie_x2 definitions and switch to it.
2021-12-07 15:27:55 +01:00
df175c5750
efinix_trion_t20_mipi_dev_kit: Add clk26.
2021-12-07 15:27:18 +01:00
59d487f9fb
butterstick: Add pullup on sdcard_cd
2021-12-07 14:32:13 +10:30
1d5bbb4c7f
Fix loading bitstream for DE1-SoC
2021-12-05 20:16:10 +01:00
90c9696c73
LED, buttons, GPIOs etc. for DE1-SoC
2021-12-05 20:16:00 +01:00
fd2ec534a7
butterstick: Add extra pins
2021-12-05 20:33:28 +10:30
61b0dfe63c
butterstick: Add additional SYZYGY connectors
2021-12-04 17:02:36 +10:30
b3175e4a9c
fairwares_xtrx: Generate Fallback/Operational bitstreams.
2021-11-26 16:20:44 +01:00
2555fdff91
fairwaves_xtrx: Add SPIFlash, I2C, GPS, I2C, AUX, RF-Switches, RF-IC IOs.
2021-11-26 16:00:07 +01:00
fe14e16c1b
Merge branch 'master' into tang_primer
2021-11-23 19:04:09 +01:00
b0dcd96964
added comments
2021-11-23 14:58:08 +01:00
0b7fabb864
FireAnt board support
2021-11-23 14:43:52 +01:00
2cc322e65d
Add initial support for Tang Primer board
2021-11-22 19:10:11 +01:00
b1817af8a8
Merge pull request #294 from antmicro/fix-ddr4-datacenter-platform
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platforms: ddr4 datacenter: invert eth clocks
2021-11-21 19:11:13 +01:00
3e9e9bc425
platforms/sqrl_acorn: Add Multiboot Operational/Fallabck bistreams generation.
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To allow recovery in case of PCIe update failure (Write error, power issue or crash).
2021-11-21 19:10:21 +01:00
fa26b126df
platforms: ddr4 datacenter: invert eth clocks
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-11-16 12:55:50 +01:00
2272962315
qmtech_10cl001: fix wrong sdram clock pin
2021-11-15 09:54:17 +07:00
06bae58f48
efinix_trion_t120_bga576: Do a bit a of cleanup on LPDDR3 now that working.
2021-11-12 19:43:28 +01:00
648d38da7e
quicklogic_quickfeather: add button and GPIOIn
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Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2021-11-12 13:21:00 +01:00
b6c5a85b98
Add initial Efinix Trion T20 MIPI Dev Kit support: CPU, ROM, RAM, UART and SPI Flash.
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Tested with:
./efinix_trion_t20_mipi_dev_kit.py --with-spi-flash --build --load
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2021 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Nov 12 2021 08:37:48
BIOS CRC passed (2bec12a3)
Migen git sha1: 7507a2b
LiteX git sha1: f679992f
--=============== SoC ==================--
CPU: VexRiscv @ 100MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 128KiB
SRAM: 8KiB
FLASH: 4096KiB
--========== Initialization ============--
Initializing W25Q32JV SPI Flash @0x00400000...
Enabling Quad mode...
First SPI Flash block erased, unable to perform freq test.
Memspeed at 0x400000 (Sequential, 4.0KiB)...
Read speed: 2.6MiB/s
Memspeed at 0x400000 (Random, 4.0KiB)...
Read speed: 1.5MiB/s
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex>
2021-11-12 08:42:10 +01:00
855fd7e3d7
efinix_trion_t120_bga576_dev_kit: Continue LPDDR3 integration...
2021-11-10 19:40:35 +01:00
224f527baa
efinix_trion_t120_bga576_dev_kit: Go a bit further in DRAM integration.
2021-11-10 12:07:30 +01:00
040e7b3104
quicklogic_quickfeather: Use initial EOS-S3 support/integration.
2021-11-09 18:59:37 +01:00
099d947a49
sqrl_acorn: fix vivado cfgbvs and config_voltage warnings
2021-11-07 16:18:22 +01:00
202b0e3e7d
sqrl_acorn: add option to use vivado programmer
2021-11-07 16:18:00 +01:00
f0356d8434
QMTech Daughterboard: remove xilinx specific attribute
2021-11-06 10:25:57 +07:00
ee5638a96b
qmtech-boards: fix serial so that it gets replaced by daughterboard serial correctly
2021-11-06 06:49:25 +07:00
6e7c76b71e
fairwaves_xtrx: Add clk60 (from USB PHY) as default Clk when no PCIe.
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Fixes CI.
2021-11-05 15:22:55 +01:00
ceaaf67dfd
Add initial Fairwaves XTRX support (SoC with JTAG-UART and PCIe Gen2 X1).
2021-11-05 14:52:45 +01:00
0edce3a176
Add support for QMTech 5CEFA2 board (Cyclone V)
2021-11-05 09:53:25 +07:00
9543b5efae
marble/marble_mini: Add berkeleylab prefix.
2021-11-04 18:42:16 +01:00
808befec3b
Merge pull request #283 from yetifrisstlama/master
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add Marble-board platform and target file
2021-11-04 15:20:11 +01:00
a4f8f12067
Merge pull request #284 from hansfbaier/master
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QMTech boards: fix swapped RX/TX lines, remove double uart replacer
2021-11-04 15:18:16 +01:00
d950b3feb5
Use built-int RS232 port
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Signed-off-by: lapd <lapd@soc.one>
2021-11-03 22:50:40 +07:00
7aa639ac0f
QMTech boards: fix swapped RX/TX lines, remove double uart replacer
2021-11-02 09:34:25 +07:00
e645eb243b
add marble board platform and target file
2021-10-28 18:41:22 +02:00
207afb98fc
ego1: Switch to VideoTerminal (LiteVideo is no longer provided by default with LiteX).
2021-10-27 16:29:46 +02:00
0ac0f9e75d
efinix_xyloni_dev_kit: Switch to openFPGALoader to load bitstream.
2021-10-25 12:49:48 +02:00
16a629269d
efinix_xyloni_dev_kit: Describe IOs in similar order than the other platforms.
2021-10-22 14:52:38 +02:00
75fd276dbe
efinix_xyloni_dev_kit: Increase similarities with others boards and make target very similar to iceBreaker/Fomu/TangNano4k.
2021-10-21 11:34:55 +02:00
dc1328f1a5
efinix_xyloni_dev_kit: Fix copyrights.
2021-10-21 10:12:46 +02:00
012c1d9705
efinix_trion_t20: Minor changes (move serial to platform, fix platform copyright).
2021-10-21 10:10:35 +02:00
c548b1c1e2
efinix: xyloni dev board basic support
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* This works: efinix_xyloni_dev_kit.py --cpu-type None --build --load --flash
* issues with SPIflash - wrong generation for tristates miso mosi for
some reason
2021-10-19 11:23:29 +11:00
a53f17380f
Merge pull request #271 from antmicro/add-data-center-board
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WIP: boards: added datacenter DDR4 RDIMM tester board
2021-10-18 13:36:37 +02:00
a2261a1e9a
Merge pull request #280 from developandplay/master
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Fix tang nano loopback and button
2021-10-16 09:09:39 +02:00
9645a9a310
efinix_trion_xx: append device with timing model
2021-10-16 07:36:06 +02:00
a3c7446a2b
Fix tang nano loopback and button
2021-10-16 04:35:23 +02:00
3730d96709
litex_acorn_baseboard: Add SPIFlash support.
2021-10-15 18:22:08 +02:00
bdf2848208
platforms/digilent_arty: Avoid commas in spiflash4x.
2021-10-15 18:22:06 +02:00
d9638c40b8
Initial support for Efinix Trion T20 BGA256 Dev Kit
2021-10-15 12:26:15 +02:00
195bf176cf
efinix_trion_t120_bga576: Add SPIFlash support (X1 for now).
2021-10-14 19:16:01 +02:00
414b3fa636
efinix_trion_t120_bga576: Add Ethernet pins of the 2 RGMII PHYs.
2021-10-14 11:51:17 +02:00
430918756d
efinix_trion_t120_bga576: Add PMODs connectors and use USB-UART/PMOD_E as Serial.
2021-10-14 10:10:42 +02:00
9145ff97d2
efinix_trio_t120_bga576: Add Switches pins.
2021-10-14 09:29:12 +02:00
5b4558c9b9
platforms/efinix_trion_t120_bga576: Add Buttons and Serial (other PMOD USB-UART).
2021-10-13 16:32:58 +02:00
a4d178a740
Add Efinix Trio T120 BGA576 Dev-Kit initial support (LedChaser).
2021-10-13 12:29:53 +02:00
e29bcd30a6
litex_acorn_baseboard: Add some M2 signals and set devslp to 0.
2021-10-12 11:54:17 +02:00
a365362f5d
Rename litex_m2_baseboard to litex_acorn_baseboard and add link to repository.
2021-10-11 18:36:12 +02:00
fe08491e8d
litex_m2_baseboard: Add LCD.
2021-10-11 18:30:23 +02:00
393252ddc9
Merge pull request #277 from hansfbaier/master
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Add support for QMTech 10CL006 board
2021-10-11 14:01:06 +02:00
79fe4a9199
Merge pull request #275 from alainlou/master
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rz_easyfpga: cleanup and ease of use
2021-10-11 13:57:06 +02:00
2b2c7d3d68
trellisboard: Add PMOD GPIO support (for tests with MicroPython).
2021-10-11 11:33:13 +02:00
d119b598c5
Add support for QMTech 10CL006 board
2021-10-05 12:06:41 +07:00
1b676f929a
cleanup and ease of use
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- update README
- delete some unnecessary toolchain commands (copied from trenz boards)
- use minimal cpu_variant by default when vexriscv is selected
2021-10-03 13:21:45 -04:00
e8611794b4
Add initial QuickLogic QuickFeather support (Led Chaser).
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Untested.
2021-10-01 10:58:26 +02:00
1858273945
mnt_rkx7: Add SPI SDCard support.
2021-09-30 18:01:54 +02:00
9bcae49629
mnt_rkx7: Add I2C (For the SiI9022A).
2021-09-30 15:33:53 +02:00
4f7c18a503
mnt_rkx7: Add Ethernet/Etherbone support.
2021-09-30 15:14:03 +02:00
84f0d715ff
mnt_rkx7: Add SDCard support.
2021-09-30 11:34:23 +02:00
31b404c42f
mng_rkx7: Add SPI Flash support.
2021-09-30 11:29:56 +02:00
df7fe5687e
Add initial MNT Reform Kintex-7 module (RKX7) support with Clk, UART and DDR3.
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Compiles but untested on hardware.
2021-09-30 11:06:39 +02:00
dfa572083a
Merge pull request #273 from ozbenh/wukong-v2
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Wukong board improvements
2021-09-28 13:22:42 +02:00
228245075a
boards: added datacenter DDR4 RDIMM tester board
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-09-27 10:15:55 +02:00
4a52996106
Wukong board improvements
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This adds support for v2 of the board via a --board-version argument
and a way to select the FPGA speed grade via a --speed-grade argument.
Note that the speed grade now defaults to -1. QMTech confirmed that
V1 of the board were made in two batches, one with -1 and one with -2,
while V2 of the board is all -1. So -1 is the safer default.
This also fixes the inversion of j10 and j11 and a typo in the pin
definition of jp3
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2021-09-24 12:13:56 +10:00
enjoy-digital
Ryszard Różak
Machdyne
inc
Robert Szczepanski
Icenowy Zheng
AEW2015
Brian Swetland
Hans Baier
minexo79
Alex Petrov
Alex Petrov
Franck Jullien
Charles-Henri Mousset
Alessandro Comodi
John Simons
Sylvain Munaut
Goran Mahovlic
Yonggang Liu
Joseph Faye
curliph
Piotr Binkowski
Karol Gugala
Dave Berkeley
Andrew Gillham
Raptor Engineering Development Team
Ilia Sergachev
Gwenhael Goavec-Merou
hubmartin
Arusekk
Jevin Sweval
Victor Suarez Rovere
Tim Callahan
Icenowy Zheng
vacajk
Gabriel Somlo
Robert Wilbrandt
Bastian Löher
Rakesh Peter
Alastair M. Robinson
Matthew Brooks
Primesh
derekmulcahy
Franck Jullien
Derek Mulcahy
Greg Davill
Marek Materzok
Miodrag Milanovic
Ilia Sergachev
lapd
Michael Betz
Andrew Dennison
Martin Troiber
alainlou
Benjamin Herrenschmidt