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Author SHA1 Message Date
Florent Kermarrec
55ea71bd01 gsd_butterstick: Add initial DDR3 support. 
Validated with:
./gsd_butterstick.py --uart-name=crossover --with-etherbone --csr-csv=csr.csv --build --load
litex_server --udp
litex_term bridge


        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Sep  1 2021 19:09:52
 BIOS CRC passed (3d349845)

 Migen git sha1: 27dbf03
 LiteX git sha1: 315fbe18

--=============== SoC ==================--
CPU:		VexRiscv @ 75MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
L2:		8KiB
SDRAM:		524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b00: |01110000| delays: 02+-01
  m0, b01: |00000000| delays: -
  m0, b02: |00000000| delays: -
  m0, b03: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b00: |01110000| delays: 02+-01
  m1, b01: |00000000| delays: -
  m1, b02: |00000000| delays: -
  m1, b03: |00000000| delays: -
  best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 15.6MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
 2021-09-01 19:21:16 +02:00
Florent Kermarrec
1f25a98476 butterstick: Add Ethernet/Etherbone support (UART crossover working over Etherbone). 2021-09-01 18:03:13 +02:00
Florent Kermarrec
1f149ece6b Add intial ButterStick support (with just Clk, Buttons and Leds). 2021-09-01 17:33:54 +02:00
Dan Callaghan
74c2178150 lattice_crosslink_nx_evn: don't set MASTER_SPI_PORT=SERIAL 
Setting MASTER_SPI_PORT=SERIAL causes the SPI flash pins to be reserved
for use by the sysCONFIG logic, and prevents user logic from assigning
them. This made it impossible to have a Litex design which accesses the
SPI flash on this board.

Remove the setting, so that we get the default behaviour which permits
user logic to assign these pins. In the unlikely event that someone
needs the pins to stay reserved for sysCONFIG after configuration (I'm
not sure why this would be needed) they could explicitly add this
command in their design.
 2021-09-01 18:47:17 +10:00
enjoy-digital
4731c500fb
Merge pull request from danc86/clnexevn-device-arg 
lattice_crosslink_nx_evn: allow specifying the FPGA device
 2021-09-01 10:22:42 +02:00
Florent Kermarrec
ce254208ff beaglewire: Review/Cleanup for consistency with other targets. 
- Now uses regular UART.
- Build tested with: ./quertyembedded_beaglewire.py --cpu-type=serv --build
- Can still be build with Crossover UART with --uart-name=crossover+bridge.
 2021-09-01 10:18:11 +02:00
Florent Kermarrec
35df77258a beaglewire: Rename to quertyembedded_beaglewire. 2021-09-01 09:36:09 +02:00
enjoy-digital
1e1f6a476d
Merge pull request from ombhilare999/master 
beaglewire platform and target added
 2021-09-01 09:33:07 +02:00
Florent Kermarrec
4a18951651 tul_pynq_z2: Fix copyrights, remove PS7 part for now. 2021-09-01 08:50:56 +02:00
enjoy-digital
54c777a49c
Merge pull request from developandplay/PYNQ-Z2 
WIP: Initial PYNQ Z2 support
 2021-09-01 08:46:44 +02:00
enjoy-digital
6a08a7973c
Merge pull request from niw/fix_orangecrab_feather_spi_pad_name 
FIX: OrangeCrab Feather SPI pad name
 2021-08-31 18:59:09 +02:00
Florent Kermarrec
8f1c15bdb8 ebaz4205: Remove PS7 support for now (since untested and we'll avoid the .xci in LiteX-Boards repository). 2021-08-31 18:56:47 +02:00
Dhiru Kholia
781d83bab6 Add support for EBAZ4205 'Development' Board 
Usage:

```
./ebaz4205.py --cpu-type=vexriscv --build --load
```

```
$ pwd
litex-boards/litex_boards/targets
```

Tip: Use `GTKTerm` to connect to /dev/ttyUSB0 (usually) and interact
with the LiteX BIOS.

References:

- https://github.com/fusesoc/blinky#ebaz4205-development-board
- https://github.com/olofk/serv/#ebaz4205-development-board
- https://github.com/xjtuecho/EBAZ4205#ebaz4205
- https://github.com/nmigen/nmigen-boards/pull/180 (merged)
- https://github.com/olofk/corescore/pull/33
- The existing 'Zybo Z7' example

Note: The `PS7` stuff remains untested via LiteX for now.
 2021-08-31 18:54:49 +02:00
Yoshimasa Niwa
fc78c96444 FIX: OrangeCrab Feather SPI pad name 
**Problems**

`SPIMaster` pad names are `clk`, `cs_n`, `mosi`, and `miso`.
However, `feather_spi` is using `sck` instead of `clk`, therefore
it is not able to use as-is for `SPIMaster`, for example,
with `add_spi` on Linux On LiteX VexRiscv.

**Solution**

In fact, `spisdcard` and other SPI related pad names are
using `clk`, only `feather_spi` is using `sck`.
Therefore, rename `sck` to `clk`.
 2021-08-29 17:59:45 -07:00
Florent Kermarrec
b017a33f2b targets: Fix SPI Flash mapping on target supporting --with-spi-flash. 2021-08-23 18:05:40 +02:00
Dan Callaghan
cc9e39286a lattice_crosslink_nx_evn: allow specifying the FPGA device 
This board is documented as having the LIFCL-40-9BG400C part, but some
versions of the board exist which were fitted with LIFCL-40-8BG400CES,
an engineering sample part. The distinction is important because the
engineering sample requires a different device ID to be embedded in the
bitstream. If you try to build a bitstream for LIFCL-40-9BG400C and load
it onto LIFCL-40-8BG400CES the configuration fails (indicated by the red
"INITN" LED on this board).

Accept --device to allow the user to specify which FPGA part their board
has.
 2021-08-17 18:30:03 +10:00
ombhilare999
db9c98b28a beaglewire platform and target added 2021-08-16 20:14:45 +05:30
Martin Troiber
22e823d756 Initial PYNQ Z2 support 2021-08-13 16:23:39 +02:00
enjoy-digital
b77b1514ce
Merge pull request from david-sawatzke/fullmemwe 
colorlight_5a_75x: Disable full_memory_we for l2 cache by default
 2021-08-11 09:53:47 +02:00
David Sawatzke
9f5e8d4864 colorlight_5a_75x: Disable full_memory_we for l2 cache by default 
Leads to an increase in DP16KD, first noticed in
https://github.com/enjoy-digital/liteeth/issues/70.
With full_mem_we:
```
Info: 	              DP16KD:    41/   56    73%
```
Without:
```
Info: 	              DP16KD:    29/   56    51%
```
 2021-08-08 14:37:46 +02:00
MV
b81309401e Initial Digilent Atlys support 2021-08-06 13:24:19 +02:00
Florent Kermarrec
615b97e205 tinyfpga_bx: Switch to LiteSPI. 2021-07-30 08:18:15 +02:00
Florent Kermarrec
90fcaec287 targets/radiona_ulx3s: Switch to LiteSPI. 2021-07-30 08:10:52 +02:00
Florent Kermarrec
fdf94b95c9 muselabe_icesugar/SPIFlash: Disable Master (to avoid wasting resources on this small FPGA). 2021-07-29 19:59:22 +02:00
Florent Kermarrec
218e830fbf muselab_icesugar_pro: Switch to LiteSPI. 2021-07-29 19:58:13 +02:00
Florent Kermarrec
569c20ab86 muselab_icesugar: Switch to LiteSPI. 2021-07-29 19:55:32 +02:00
Florent Kermarrec
8df797c716 lattice_ice40up5k_evn: Switch to LiteSPI. 2021-07-29 19:50:36 +02:00
Florent Kermarrec
5e8c29d657 colorlight_i5: Switch to LiteSPI. 2021-07-29 19:47:41 +02:00
Florent Kermarrec
35ba3d9bc3 targets: Remove old call to add_spi_flash on targets now using LiteSPI (we'll find it with gitk is required). 2021-07-29 11:55:10 +02:00
Florent Kermarrec
54cee05986 : Minor cleanup. 2021-07-28 18:20:42 +02:00
enjoy-digital
a41fbea5e6
Merge pull request from JosephBushagour/jbushagour_fomu_spi_options 
Add option for different Fomu SPI ICs.
 2021-07-28 18:18:12 +02:00
Sergiu Mosanu
99ff82c75a xilinx_alveo_u280: Add more IOs and enable HBM2. 2021-07-28 18:11:49 +02:00
Joey Bushagour
7b3dce65c1 Add option for different Fomu SPI chips. 
Signed-off-by: Joey Bushagour <jbushagour@google.com>
 2021-07-28 10:34:02 -05:00
Florent Kermarrec
401568c54e digilent_arty_s7: Add SPI Flash. 2021-07-28 14:22:26 +02:00
Florent Kermarrec
64eadd8012 hackaday_hadbadge: Lower PLL's PFD Min from 10MHz to 8MHz. 
This is now required since ECP5PLL now checks that PFD is in required range.
 2021-07-28 12:25:17 +02:00
Florent Kermarrec
6ce5db1b90 qmtech_xc7a35t: Fix default build. 2021-07-28 12:23:24 +02:00
Florent Kermarrec
1f4383475a decklink_intensity_pro_4k: Fix default build. 2021-07-28 12:23:12 +02:00
Florent Kermarrec
3e8b6677e9 platforms: Make sure all platforms have a default Clk. (To be able to run simple target). 2021-07-28 12:03:06 +02:00
Florent Kermarrec
4e2b596ab3 digilent_arty/qmtech_xc7a35t: Rename --with-mapped-flash to --with-spi-flash. 2021-07-28 11:21:51 +02:00
Florent Kermarrec
fa3cc9b753 kosagi_fomu/spiflash: Switch to READ_1_1_4. 2021-07-28 11:10:34 +02:00
Florent Kermarrec
1118b09350 trenz_tec0117: Switch to LiteSPI. 2021-07-28 10:34:17 +02:00
Florent Kermarrec
9065cfa75d kosagi_fomu: Switch to LiteSPI. 2021-07-27 19:55:04 +02:00
Florent Kermarrec
b3e7dbfd30 qmtech_xc7a35t: LiteSPI integration now provided by LiteX. 2021-07-27 19:39:50 +02:00
Florent Kermarrec
55ba0591df targets: Remove SpiFlash imports (Obsolete since integration is provided by LiteX). 2021-07-27 19:35:19 +02:00
Florent Kermarrec
1c52e6b8fb targets/digilent_arty/spiflash: LiteSPI integration now provided by LiteX. 2021-07-27 19:30:38 +02:00
Florent Kermarrec
15b5aec23f 1bitsquared_icebreaker_bitsy: Also switch to LiteSPI. 2021-07-27 19:27:28 +02:00
Florent Kermarrec
959780f372 1bitsquared_icebreaker: Switch to LiteSPI (with integration now done by LiteX). 
Keep the old add_spi_flash call commented for now just in case we need to compare/test it.
 2021-07-27 19:23:26 +02:00
Florent Kermarrec
533d25e845 1bitsquared_icebreaker: Enable LiteSPI Master but reduce FIFO depth to reduce resource usage. 
Already better regarding resource usage:
Info: 	         ICESTORM_LC:  2938/ 5280    55%
Info: 	        ICESTORM_RAM:     2/   30     6%
Info: 	               SB_IO:    15/   96    15%
Info: 	               SB_GB:     8/    8   100%
Info: 	        ICESTORM_PLL:     1/    1   100%
Info: 	         SB_WARMBOOT:     0/    1     0%
Info: 	        ICESTORM_DSP:     0/    8     0%
Info: 	      ICESTORM_HFOSC:     0/    1     0%
Info: 	      ICESTORM_LFOSC:     0/    1     0%
Info: 	              SB_I2C:     0/    2     0%
Info: 	              SB_SPI:     0/    2     0%
Info: 	              IO_I3C:     0/    2     0%
Info: 	         SB_LEDDA_IP:     0/    1     0%
Info: 	         SB_RGBA_DRV:     0/    1     0%
Info: 	      ICESTORM_SPRAM:     4/    4   100%
 2021-07-27 17:38:25 +02:00
Florent Kermarrec
12fb315e09 1bitsquared_icebreaker: Disable LiteSPI Master. 
Requires 80e9d2cea9

Already better regarding resource usage:

Info: 	         ICESTORM_LC:  2358/ 5280    44%
Info: 	        ICESTORM_RAM:     2/   30     6%
Info: 	               SB_IO:    15/   96    15%
Info: 	               SB_GB:     8/    8   100%
Info: 	        ICESTORM_PLL:     1/    1   100%
Info: 	         SB_WARMBOOT:     0/    1     0%
Info: 	        ICESTORM_DSP:     0/    8     0%
Info: 	      ICESTORM_HFOSC:     0/    1     0%
Info: 	      ICESTORM_LFOSC:     0/    1     0%
Info: 	              SB_I2C:     0/    2     0%
Info: 	              SB_SPI:     0/    2     0%
Info: 	              IO_I3C:     0/    2     0%
Info: 	         SB_LEDDA_IP:     0/    1     0%
Info: 	         SB_RGBA_DRV:     0/    1     0%
Info: 	      ICESTORM_SPRAM:     4/    4   100%

We can still try to reduce it, but enabling Master should not use that much LCs.
 2021-07-27 17:00:55 +02:00
Florent Kermarrec
0f648ac4ef 1bitsquared_icebreaker: Add test code to use LiteSPI. 
Both XiP from SPI(1X) or QSPI(4X) are working, but resource usage is currently
too high to be able to switch to it by default. We'll first try to reduce it.

Resource usage using SPI(1X) and actual LiteX SPI Flash core:
Info: Device utilisation:
Info: 	         ICESTORM_LC:  2016/ 5280    38%
Info: 	        ICESTORM_RAM:     2/   30     6%
Info: 	               SB_IO:    15/   96    15%
Info: 	               SB_GB:     8/    8   100%
Info: 	        ICESTORM_PLL:     1/    1   100%
Info: 	         SB_WARMBOOT:     0/    1     0%
Info: 	        ICESTORM_DSP:     0/    8     0%
Info: 	      ICESTORM_HFOSC:     0/    1     0%
Info: 	      ICESTORM_LFOSC:     0/    1     0%
Info: 	              SB_I2C:     0/    2     0%
Info: 	              SB_SPI:     0/    2     0%
Info: 	              IO_I3C:     0/    2     0%
Info: 	         SB_LEDDA_IP:     0/    1     0%
Info: 	         SB_RGBA_DRV:     0/    1     0%
Info: 	      ICESTORM_SPRAM:     4/    4   100%


Resource usage using LiteSPI:
Info: Device utilisation:
Info: 	         ICESTORM_LC:  3964/ 5280    75%
Info: 	        ICESTORM_RAM:     2/   30     6%
Info: 	               SB_IO:    15/   96    15%
Info: 	               SB_GB:     8/    8   100%
Info: 	        ICESTORM_PLL:     1/    1   100%
Info: 	         SB_WARMBOOT:     0/    1     0%
Info: 	        ICESTORM_DSP:     0/    8     0%
Info: 	      ICESTORM_HFOSC:     0/    1     0%
Info: 	      ICESTORM_LFOSC:     0/    1     0%
Info: 	              SB_I2C:     0/    2     0%
Info: 	              SB_SPI:     0/    2     0%
Info: 	              IO_I3C:     0/    2     0%
Info: 	         SB_LEDDA_IP:     0/    1     0%
Info: 	         SB_RGBA_DRV:     0/    1     0%
Info: 	      ICESTORM_SPRAM:     4/    4   100%
 2021-07-27 16:50:18 +02:00
Florent Kermarrec
0ca203487b pr243: Make led_chaser optional. 2021-07-27 15:00:18 +02:00
Florent Kermarrec
9835bd5f93 targets/muselab_icesugar_pro: +x. 2021-07-27 14:56:33 +02:00
Florent Kermarrec
2df3f9e664 pr243/platforms: Consistency with other platforms. 2021-07-27 14:55:19 +02:00
Florent Kermarrec
3fb73b3603 platforms/digilent_nexys4ddr: Fix INTERNAL_VREF voltage (0.900v instead of 0.750v). 2021-07-27 12:29:42 +02:00
Florent Kermarrec
2becaaabfc pr243: Minor platform cleanups. 2021-07-27 12:28:04 +02:00
Florent Kermarrec
2418df9f2b pr243: Add @tweakoz copyrights. 2021-07-27 12:21:23 +02:00
enjoy-digital
369d2cf49d
Merge pull request from tweakoz/master 
add FPGA Boards (Digilent CMOD A7, Digilent Nexys 4, Micronova Mercury2)
 2021-07-27 12:17:04 +02:00
Florent Kermarrec
10bfd50e22 targets/1bitsquared_icebreaker: Revert to 128KB SPRAM. 2021-07-27 12:03:39 +02:00
enjoy-digital
4d20cfe5cd
Merge pull request from racerxdl/feat/MuselabIceSugarPro 
muselab_icesugar_pro: initial support
 2021-07-23 14:34:57 +02:00
Lucas Teske
5852dbb88f
muselab_icesugar_pro: initial support 2021-07-22 11:26:27 -03:00
Florent Kermarrec
a3f479837c digilent_arty: Allow exposing raw PMOD IOs (for tests with MicroPython). 2021-07-21 13:50:12 +02:00
Florent Kermarrec
a455713e0c kosagi_fomu: Handle bios_flash_offset in flash function and make DFU flash offset explicit. 2021-07-21 11:41:35 +02:00
enjoy-digital
fbcecee1f8
Merge pull request from tcal-x/fix-basys3-rst 
Basys3: Invert reset button, so that the board is reset when btnc is pushed.
 2021-07-20 19:47:53 +02:00
Florent Kermarrec
8c8e163eee trenz_tec0117: Add SDCard (SPI and SD mode), move SPI Flash to 0x00000000 and use default l2_cache_min_data_width. 2021-07-20 17:25:51 +02:00
Michael Mayers
75cadf845f add FPGA Boards 
1.  Digilent CMOD A7
      https://reference.digilentinc.com/programmable-logic/cmod-a7/start

2. Digilent Nexys 4
      https://reference.digilentinc.com/programmable-logic/nexys-4/start

3. MicroNova Mercury 2
      https://www.micro-nova.com/mercury-2
 2021-07-17 22:03:17 -06:00
Tim Callahan
5da2bdefb7 Invert reset button, so that board is reset when btn is pushed. 
Signed-off-by: Tim Callahan <tcal@google.com>
 2021-07-16 13:08:18 -07:00
enjoy-digital
4b48f15265
Merge pull request from JosephBushagour/jbushagour_with_led_chaser 
Add with_led_chaser argument to constructor of boards using LedChaser submodule.
 2021-07-16 14:41:05 +02:00
Florent Kermarrec
a74b6e83f7 trenz_tec0117: Add clock constraints. 2021-07-15 11:07:05 +02:00
Florent Kermarrec
6648b2f907 targets/trenz_tec0117: Switch SPI Flash to QSPI mode. 2021-07-15 09:15:34 +02:00
Florent Kermarrec
c369f4bb7f trenz_tec0117: Get BIOS XiP from SPI Flash working, remove CPU variant force since can now fit default VexRiscv config. 2021-07-14 12:49:03 +02:00
Florent Kermarrec
132feaf3e8 trenz_tec0117: Prepare for 1:2 SDRAM rate (Not yet working at 1:2 but one step closer...). 2021-07-14 10:43:26 +02:00
Florent Kermarrec
ba8321a3ab trenz_tec0117: Use new DDROutput to generate SDRAM Clk. 2021-07-14 10:02:58 +02:00
Florent Kermarrec
94b985ac56 trenz_tec0117: Use new integrated reset from GW1NPLL. 2021-07-14 09:55:00 +02:00
Florent Kermarrec
6e31d12fa9 trenz_tec0117: Avoid forcing CPU type (only force to lite variant when VexRiscv is selected=default). 2021-07-13 19:39:53 +02:00
Joey Bushagour
1920db3535 Add with_led_chaser argument to constructor of boards using LedChaser submodule. 2021-07-06 16:39:37 -05:00
Florent Kermarrec
8c1e6c6a02 decklink_quad_hdmi_recorder: Remove WIP (SoC + DDR3 now working) and add build/use instructions. 2021-07-02 15:54:57 +02:00
Florent Kermarrec
2dff854b7a decklink_quad_hdmi_recorder: Enable second DDR3 module. 2021-07-02 15:52:12 +02:00
Florent Kermarrec
a02855d105 decklink_quad_hdmi_recorder: Increase sys_clk to 200MHz. 2021-07-02 15:07:13 +02:00
Florent Kermarrec
b18f6a2c7f decklink_quad_hdmi_recorder: Enable DRAM modules 0 and 1, fix pre placement constraints. 2021-07-02 14:32:53 +02:00
Florent Kermarrec
548f77c79c decklink_quad_hdmi_recorder: Add INTERNAL_VREF constraint on DRAM banks. 2021-07-02 14:32:14 +02:00
Florent Kermarrec
7442639a5e targets/digilent_arty: Add default value for CRG's with_mapped_flash. 
Otherwise break retro-compat on external design importing CRG without passing this new parameter.
 2021-07-02 09:33:06 +02:00
Florent Kermarrec
1b65bad4c2 decklink_quad_hdmi: Add Clk IOs, use clk200 as primary clk and add JTAGBone. 2021-07-01 20:00:35 +02:00
Florent Kermarrec
18b2758e4e decklink_quad_hdmi_recorder: Add other DDR3 SDRAM modules building but untested. 2021-06-30 11:50:42 +02:00
Florent Kermarrec
e65308ee13 decklink_quad_hdmi_recorder: Add DDR3 SDRAM (only first module), building but untested. 2021-06-30 09:40:08 +02:00
Florent Kermarrec
84cb5d797d decklink_intensity_pro_4k: Add WIP. 2021-06-30 09:06:00 +02:00
Sylvain Munaut
7cb155fb9c icebreaker: Minor fix to usb (add PMOD2 position and fix typo) 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2021-06-27 16:00:09 +02:00
Florent Kermarrec
591377cf95 decklink: Pinout fixes on itensity_pro_4k and quad_hdm_recorder. 2021-06-25 11:19:05 +02:00
Florent Kermarrec
ebfb4fad57 Add initial Decklink Intensity Pro 4K support (with documented PCIe / Untested). 2021-06-24 19:55:40 +02:00
Florent Kermarrec
5f8560bf69 Add initial Decklink Quad HDMI Recorder support (with documented PCIe/HDMI In). 
LitePCIe Gen3 X4 enumerating correctly.
 2021-06-24 19:48:31 +02:00
Florent Kermarrec
8ec1435e65 targets/decklink_mini_4k: Fix typos. 2021-06-24 19:13:18 +02:00
Sylvain Munaut
87cd56d187 targets: Add new 1bitsquared_icebreaker_bitsy target 
Most basic SoC ever but ... it runs

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2021-06-21 22:11:53 +02:00
Sylvain Munaut
2ebcb4a726 platforms: Add new 1bitsquared_icebreaker_bitsy platform 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2021-06-21 16:17:54 +02:00
Sylvain Munaut
4c758dc0e3 platforms/1bitsquared_icebreaker: Fix wrong URL in header 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2021-06-21 16:16:47 +02:00
Sylvain Munaut
675616493c platform/1bitsquare_icebreaker: Add possible USB pinouts 
The pin outs come from LUNA :
https://github.com/greatscottgadgets/luna/blob/main/luna/gateware/platform/icebreaker.py#L94

and are some commonly used ones from other projects / pmods.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2021-06-20 22:25:49 +02:00
Florent Kermarrec
caac75c7db trenz_max1000: Review/Cleanup. 2021-06-16 18:04:55 +02:00
Antti Lukats
8ef138eaa0 added MAX1000 board 2021-06-16 17:55:06 +02:00
Florent Kermarrec
fa045e6fa4 enclustra_mercury_kx2: Comment user_led2/3 (Conflicting with DRAM pins). 2021-06-16 11:54:52 +02:00
David Sawatzke
fe7b3968e4 Fix colorlight 5a 75b v6.1 flash pins 
As with the other versions, the clk pin can't be directly driven
 2021-06-06 02:59:48 +02:00
enjoy-digital
588b430a0c
Merge pull request from hansfbaier/master 
QMTech EP4CE15: Add daughterboard support, small DECA addition
 2021-05-25 10:15:26 +02:00
Florent Kermarrec
df10fc54ad muselab_icesugar/trenz_cyc1000: +x. 2021-05-25 08:46:33 +02:00
Florent Kermarrec
1c4825e7c4 basys3: Review/Simplify and fix build. 2021-05-25 08:44:26 +02:00
enjoy-digital
25867c4dcb
Merge pull request from helium729/master 
Add digilent basys3 board support
 2021-05-23 19:46:58 +02:00
Jakub Cabal
dd5a4bdc92 CYC1000: Add initial support of CYC1000 board 2021-05-22 21:17:27 +02:00
Florent Kermarrec
bf123db20b icebreaker/fomu: Update flashing and disconnect reset from SoC (will need proper support in iCE40PLL). 2021-05-20 09:14:54 +02:00
helium729
ce5b2a74a1 add digilent basys3 support 2021-05-17 16:39:16 +08:00
Hans Baier
f01e0c02c9 qmtech ep4ce15: Add daughterboard support, add spiflash 2021-05-15 13:16:43 +07:00
enjoy-digital
c010b9a335
Merge pull request from hansfbaier/qmtech-xc7a35t 
Qmtech xc7a35t
 2021-05-10 08:31:08 +02:00
Hans Baier
ddaab5317e qmtech_xc7a35 set symbiflow_device, needed when using symbiflow 2021-05-08 18:01:01 +07:00
Hans Baier
df447ddc87 QMTech XC7A35T: fix argument parser description 2021-05-08 08:49:07 +07:00
Hans Baier
f2b51b0233 icesugar: map the usb port 2021-05-08 07:34:10 +07:00
Florent Kermarrec
5027b270fd __init__.py: Add muselab to vendors. 2021-05-07 09:10:51 +02:00
Florent Kermarrec
e99272cb07 muselab_icesugar: Modify comments a bit. 2021-05-07 08:57:34 +02:00
enjoy-digital
5ae130661f
Merge pull request from hansfbaier/icesugar 
muselab_icesugar: first basic version which boots
 2021-05-07 08:50:50 +02:00
enjoy-digital
2c2a9db3cc
Merge pull request from hansfbaier/qmtech-xc7a35t 
add QMTECH XC7A35T core board + daughter board
 2021-05-07 08:32:16 +02:00
enjoy-digital
9e86c094c9
Merge pull request from Acathla-fr/master 
Lattice iCE40 UltraPlus Breakout board (iCE40UP5K-B-EVN) added
 2021-05-07 08:30:01 +02:00
Hans Baier
c2e0f6026e muselab_icesugar: first basic version that boots 2021-05-07 11:50:28 +07:00
Florent Kermarrec
3bb84b0071 Add initial Blackmagic Decklink Mini 4K support (with UART, DDR3, PCIe, Video Out). 
Mini Monitor 4K and Mini Recorder 4K are almost the same hardware with just changes on
the Video In/Out. For now tests have been done on the Mini Monitor 4K, but the aim  is
support both boards in the same platform/target in the future, thus the mini_4k naming.

These boards could be used as affordable Artix7 dev boards for LiteX, to run Linux with
LiteX (512MB of RAM + a Video Framebuffer) or to create custom systems like a fast software
defined signal generator/recorder directly from a PC over PCIe, custom HDMI/SDI video
cards, etc... lots of possibilities :)
 2021-05-06 09:47:01 +02:00
Hans Baier
eec1078736 add QMTECH XC7A35T core board + daughter board 2021-05-06 05:50:48 +07:00
Fabien
213d100860 Lattice iCE40 UltraPlus Breakout board (iCE40UP5K-B-EVN) added 2021-05-04 12:19:21 +02:00
enjoy-digital
026c623e17
Merge pull request from hplp/master 
Minor fixes for AU280 [work in progress]
 2021-05-03 10:20:34 +02:00
Florent Kermarrec
2c5bf95f70 targets/trenz_tec0117: Switch to new GW1NPLL. 2021-04-30 11:32:24 +02:00
Sergiu Mosanu
4f45462b95 Merge branch 'master' of https://github.com/litex-hub/litex-boards 2021-04-29 15:41:03 -04:00
Florent Kermarrec
9686db0ed3 targets: Update names in build descriptions. 2021-04-29 11:56:52 +02:00
Florent Kermarrec
6117b98049 siglent_sds1104xe: Avoid disabling hardware interface with BIOS ethernet reset. 2021-04-29 11:52:41 +02:00
Florent Kermarrec
c28a161392 siglent_sds1104xe: Expose ethphy (to allow correct .dts generation). 2021-04-29 11:02:13 +02:00
Florent Kermarrec
7d651a9a17 siglent_sds1104xe: Switch to VideoVGAPHY and adjust timings. 2021-04-29 10:41:19 +02:00
Florent Kermarrec
cfbcb8538d siglent_sds1104xe: Use custom 800x480 video timings. 2021-04-28 16:59:09 +02:00
enjoy-digital
84e65d2113
Merge pull request from hansfbaier/master 
terasic_sockit: fix: make video clock also optional as video terminal is optional
 2021-04-28 09:42:13 +02:00
enjoy-digital
be6d08aff1
Merge pull request from antmicro/jboc/lpddr4-tb-eth-delay 
antmicro_lpddr4_test_board: fix ethernet rx delay issue
 2021-04-28 09:41:11 +02:00
Sergiu Mosanu
8ad91d9eb3 fix cmdltncy, with_led 2021-04-27 17:30:56 -04:00
Florent Kermarrec
f7ee3fa454 sds1104xe: Framebuffer fixes. 2021-04-27 19:32:03 +02:00
Hans Baier
694608688d terasic_sockit: fix: make video clock also optional as video terminal is optional 2021-04-27 08:52:11 +07:00
Florent Kermarrec
5bfeb999e4 targets/digilent_arty/flash: Simplify, use Quad mode and sys_clk (fast enough ~5MB/s). 2021-04-26 16:30:35 +02:00
Karol Gugala
2854df5028 Arty: move spiflash PHY do 4x faster clk domain 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2021-04-26 12:52:36 +02:00
Karol Gugala
84ae2b2bbc arty: add option to use litespi QSPI controller 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2021-04-26 12:52:30 +02:00
Jędrzej Boczar
2d2a10621f antmicro_lpddr4_test_board: fix ethernet rx delay issue 2021-04-23 15:25:47 +02:00
Florent Kermarrec
228a9650d4 sqrl_acorn: Add flashing/reload support when used with PCIe, fix JTAG flash. 2021-04-21 17:00:40 +02:00
Florent Kermarrec
443b954c0c platforms/xilinx_kcu105: Add Pmod0/1 connectors. 2021-04-19 15:11:43 +02:00
Shinken Sanada
d2eabd112d Add E-Elements Ego1 initial board support. 2021-04-12 08:20:46 +02:00
Shinken Sanada
cd3d4c826e Add Trenz te0725 initial board support. 2021-04-12 08:16:45 +02:00
Sergiu Mosanu
5519c931f8 xilinx_alveo_u280: Fix DDR4 (tested with 8 modules on C0 and C1). 2021-04-12 08:07:16 +02:00
enjoy-digital
d830ef8393
Merge pull request from rdolbeau/wukong_ethfix_fb 
Qmtech Wukong: updates
 2021-04-11 14:44:25 +02:00
enjoy-digital
2a7d8c5330
Merge pull request from zyp/ignore_missing_deps 
boards/compat: Skip targets with unsatisfied dependencies.
 2021-04-11 14:43:01 +02:00
Vegard Storheil Eriksen
bad8821c2d platforms/ecpix5: Add ULPI signals. 2021-04-11 11:12:56 +02:00
Romain Dolbeau
d5318dcb03 Qmtech Wukong: updates 
fix ethernet clock (it's a GMII), add FB support over the HDMI connector (hdmi clock set from the resolution)
 2021-04-10 16:26:25 +02:00
Vegard Storheil Eriksen
2e204285de boards/compat: Skip targets with unsatisfied dependencies. 
Fixes
2021-04-10 11:41:13 +02:00
Florent Kermarrec
03accabc25 lpddr4_test_board: Add antmicro vendor prefix. 2021-03-31 09:48:23 +02:00
Jędrzej Boczar
a834985e00 Add target for LPDDR4 Test Board 2021-03-30 14:50:02 +02:00
Florent Kermarrec
d5ce1901d8 targets/digilent_nexys_video: Add specific Video PLL to give more flexibility on supported Video Timings. 2021-03-30 10:17:50 +02:00
Florent Kermarrec
9417044584 targets: Minor cleanup, make sure all targets can be built with default settings. 2021-03-29 16:22:39 +02:00