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266 commits

Author SHA1 Message Date
Robert Jordens
8de5b947bd pipistrello: use fpgaprog 2015-02-26 21:34:02 -07:00
Robert Jordens
ca52aa5b8c add fpgaprog programmer 2015-02-26 21:33:49 -07:00
Robert Jordens
5b5d2d15b8 add pipistrello platform 2015-02-26 21:33:42 -07:00
Sebastien Bourdeauducq
ba26a400e3 Merge branch 'master' of https://github.com/m-labs/migen 2015-02-26 21:32:39 -07:00
Sebastien Bourdeauducq
28c219ebd2 platforms/kc705: add user SMA clock 2015-02-26 16:22:22 -07:00
Yann Sionneau
dbdb263acc mibuild/kc705: add missing pins on FMC LPC 2015-02-26 15:54:41 -07:00
Florent Kermarrec
8da1faf310 mibuild: move identifier to platforms 2015-02-26 19:00:43 +01:00
Florent Kermarrec
e6a21b2305 mibuild: fix missing xilinx_common -->xilinx.common change 2015-02-26 14:04:36 +01:00
Florent Kermarrec
bd5ed0977b platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms) 2015-02-26 12:51:57 +01:00
Florent Kermarrec
e27a94e7fc mibuild: add VivadoProgrammer (only load_bitstream) 2015-02-26 12:31:19 +01:00
Florent Kermarrec
b3faf5f0da mibuild: better file organization (create directory for each vendor and move programmers in it) 2015-02-26 12:25:59 +01:00
Yann Sionneau
5bb1c789aa mibuild/kc705: add FMC connectors 2015-02-18 08:32:45 -07:00
Yann Sionneau
cea1551ae0 mibuild: support pin names in IO extensions 2015-02-18 08:32:31 -07:00
Sebastien Bourdeauducq
d51d33af73 mibuild: make resolve_signals public 2015-02-14 03:05:07 -08:00
Florent Kermarrec
beef7425ce mibuild: return verilog namespace with build 2015-02-14 03:02:47 -08:00
Sebastien Bourdeauducq
6fca1dd4dc mibuild/xilinx_vivado: fix list aliasing problem 2014-12-21 17:37:11 +08:00
Florent Kermarrec
8576b91290 xilinx_vivado: add parameters to pass specific commands (to be declared in platforms) 2014-12-21 17:35:42 +08:00
Florent Kermarrec
b87ad1af63 xilinx_vivado: use REM for comment on Windows 2014-11-20 15:27:14 -08:00
Sebastien Bourdeauducq
dff3a17711 mibuild/programmer: add migen folders to flash proxy search dirs 2014-11-05 23:23:22 +08:00
Florent Kermarrec
648ab8fa7a kc705: add Ethernet pins 2014-11-01 21:11:47 +08:00
Florent Kermarrec
c0c04a1878 xilinx_vivado: use .bat on Windows platforms (otherwise Vivado uses Unix scripts...) 2014-11-01 20:59:19 +08:00
Florent Kermarrec
51f699758c xilinx_vivado: add hierarchical utilization report 2014-11-01 20:57:54 +08:00
Florent Kermarrec
dbaeaf7833 remove trailing whitespaces 2014-10-17 17:08:46 +08:00
Robert Jordens
4328122a9c vivado: add more reporting 2014-09-04 15:25:34 +08:00
Robert Jordens
7c19e43444 vivado: mode batch to prevent vivado from opening tcl shell on error 2014-09-04 15:25:34 +08:00
Sebastien Bourdeauducq
f21e05025d platforms/kc705: use jtaghs1_fast cable 2014-09-03 17:29:26 +08:00
Florent Kermarrec
644fa8ec55 kc705: enable DCI termination on DDR3 2014-09-02 10:54:38 +08:00
Sebastien Bourdeauducq
402c7db63c platforms/kc705: read the configuration flash faster (ISE only) 2014-08-22 18:44:10 +08:00
Sebastien Bourdeauducq
cb5894b33c platforms: add -w option to bitgen_opt 2014-08-22 18:26:25 +08:00
Florent Kermarrec
7f4e51253e kc705: add spiflash pins 2014-08-22 10:32:58 +08:00
Florent Kermarrec
c19d134978 vivado: enable bitstream compression (optional) 2014-08-21 20:22:08 +08:00
Robert Jordens
7e77254c57 vivado: make tcl a list of commands, add reporting 2014-08-18 11:01:56 +08:00
Sebastien Bourdeauducq
c61f96588a mibuild/programmer: remove unneeded needs_flash_proxy attr 2014-08-09 14:28:15 +08:00
Sebastien Bourdeauducq
54c63275e0 platforms/kc705: remove DDR3 multirank pins 2014-08-09 10:56:59 +08:00
Sebastien Bourdeauducq
5fb221e7d9 typo 2014-08-06 23:58:09 +08:00
Sebastien Bourdeauducq
7ebf08db5e mibuild/xilinx: connect CE on reset synchronizer FFs 2014-08-06 23:51:50 +08:00
Sebastien Bourdeauducq
b124a98d92 genlib: add reset synchronizer 2014-08-06 19:38:37 +08:00
Sebastien Bourdeauducq
4d382328d5 mibuild/xilinx: share more code between ISE and Vivado, use special overrides with Vivado, merge xilinx_tools into xilinx_common 2014-08-06 19:26:00 +08:00
Sebastien Bourdeauducq
8a7afff30a platforms/kc705: fix speed grade 2014-08-03 17:51:44 +08:00
Sebastien Bourdeauducq
8adf6027e1 platforms/kc705: add automatic clk200 constraint 2014-08-03 15:53:58 +08:00
Sebastien Bourdeauducq
40dcc8b2aa platforms/kc705: use XC3SProg 2014-08-03 15:53:42 +08:00
Sebastien Bourdeauducq
210cb720c1 platforms/kc705: use Vivado by default 2014-08-03 15:53:21 +08:00
Sebastien Bourdeauducq
536a220679 mibuild/programmer: fix XC3SProg init 2014-08-03 15:52:34 +08:00
Florent Kermarrec
a0d0742664 mibuild/generic_platform: add recursive parameter to add_source_dir 2014-08-02 21:25:51 +08:00
Florent Kermarrec
82068267db mibuild: move programmer to mibuild and create programmer directly in platforms 2014-08-01 08:03:36 +08:00
Sebastien Bourdeauducq
244ee52381 kc705/ddram: use lighter pin syntax 2014-07-30 10:31:26 +08:00
Florent Kermarrec
9cf204598a mibuild/xilinx_vivado: allow sharing Misc constraints with ISE: example: ISE: DIFF_TERM=True VIVADO: set property DIFF_TERM TRUE 2014-07-30 10:10:41 +08:00
Florent Kermarrec
84eb146e0a kc705: add ddram pins 2014-07-28 21:35:18 -06:00
Robert Jordens
fe1c4535d0 mibuild.xilinx_vivado: support settingsXX.sh 
* in the process refactor the version search, the architecture bit width
 detection, the settings search and all also for xilinx_ise
* use distutils.version.StrictVersion
 2014-07-27 19:50:15 -06:00
Fabien Marteau
a53feba8a1 mibuild/platforms: add APF27 and APF51 Armadeus platforms 2014-07-11 11:07:54 -06:00
Fabien Marteau
f45897c97f mibuild/generic_platform.py: adding ability to use void pins (none fpga pin) for connectors 
Signed-off-by: Fabien Marteau <fabien.marteau@armadeus.com>
 2014-07-09 10:41:51 +02:00
Florent Kermarrec
f6dfabf7a9 mibuild/xilinx_vivado.py: add set property to misc constraint 2014-06-28 16:15:07 +02:00
Florent Kermarrec
7ad1028f8b mibuild: use SimpleCRG instead of CRG_SE, remove period parameter for CRG_DS, clean up platforms 2014-06-20 17:29:29 +02:00
Sebastien Bourdeauducq
26717a49fe kc705: use string default arg 2014-06-07 13:41:46 +02:00
Florent Kermarrec
be0d86f57f initial Vivado support 2014-06-07 12:24:28 +02:00
Florent Kermarrec
518a6822d9 mibuild/platforms: use add_period_constraint 2014-05-21 21:02:06 +02:00
Florent Kermarrec
a1a57fd962 mibuild: expose add_period_constraint (easier to use for simple designs than vendor specific code) 2014-05-21 21:02:06 +02:00
Florent Kermarrec
6c78e6f729 mibuild/altera_quartus: use default gui command line parameters (enable pll constraints propagation) and remove deprecated methods 2014-05-21 21:02:06 +02:00
Sebastien Bourdeauducq
e9db646134 mibuild: remove useless 'reduce_control_sets auto' 2014-05-12 19:11:11 +02:00
Robert Jordens
65e8b2742a de0nano: call sdram mask dm, not dqm (follow other platforms and gensdrphy) 2014-04-25 10:40:26 +02:00
Florent Kermarrec
8c03cb0491 mibuild: force shell script generation to unix format (will be executed with cygwin's bash on windows) 2014-04-17 19:43:56 +02:00
Florent Kermarrec
d1a96bc49f mibuild/altera_quartus: enforce use of SystemVerilog in Quartus (Verilog does not support global parameters) 2014-04-17 19:43:24 +02:00
Florent Kermarrec
fef08e8c70 mibuild: add bitstream_ext parameter to platforms 2014-04-11 23:28:39 +02:00
Florent Kermarrec
82e4980f5c mibuild/altera_quartus: set top_level_entity 2014-04-11 23:27:04 +02:00
Florent Kermarrec
600ce55f91 mibuild/altera_quartus: add support for verilog include 2014-04-11 23:24:51 +02:00
Robert Jordens
e94f30f15d mibuild/xilinx_ise: move overwrite option to default options 2014-04-05 12:15:15 +02:00
Robert Jordens
9ff6cc8403 mibuild/xilinx: make par and map options configurable 2014-04-05 12:15:14 +02:00
Sebastien Bourdeauducq
bf6ab2b4f6 mibuild/generic_platform: fix default value for connectors 2014-02-17 17:40:15 +01:00
Sebastien Bourdeauducq
c98b9ecbcb mibuild/platforms/papilio_pro: add expansion connectors 2014-02-16 23:54:11 +01:00
Sebastien Bourdeauducq
cb2c9f9f7a mibuild: support for expansion connectors 2014-02-16 23:53:50 +01:00
Sebastien Bourdeauducq
4e9dc297fd platforms/rhino: add GPMC wait pin 2013-12-14 14:32:34 +01:00
Sebastien Bourdeauducq
3196462311 add support for Verilog include paths 2013-12-12 23:17:51 +01:00
Robert Jordens
fe0263bb9a mibuild/xilinx_ise: use ngdbuild_opt also for xst case 2013-12-06 12:15:22 +01:00
Robert Jordens
0aa6329edb mibuild/xilinx_ise: add support for custom tools and options 2013-12-06 09:16:07 +01:00
Robert Jordens
e09e85ec8e usrp_b100 platform 2013-12-03 22:51:52 +01:00
Robert Jordens
5447eb51ba add zedboard platform 2013-12-03 22:51:52 +01:00
Robert Jordens
bfdc14fbc3 add initial ztex_115d platform 2013-12-03 22:51:52 +01:00
Sebastien Bourdeauducq
8d093a4a08 lx9 fixups 2013-12-03 22:51:52 +01:00
Sebastien Bourdeauducq
de830dc743 mibuild: use keyword arguments directly in build_cmdline 2013-12-01 17:56:07 +01:00
Sebastien Bourdeauducq
80be6acfd1 mibuild: add support for Yosys 2013-12-01 17:07:48 +01:00
Sebastien Bourdeauducq
6140fd2594 platforms/papilio_pro: add 2x SPI pins 2013-11-25 15:14:58 +01:00
Sebastien Bourdeauducq
6e48682a5e platforms/papilio_pro: fix clock signal handling 2013-11-24 23:42:31 +01:00
Sebastien Bourdeauducq
c514fdc4a3 platforms/m1: use definition compatible with Mixxeo for VGA out 2013-11-24 14:00:22 +01:00
Sebastien Bourdeauducq
8efd9d11dc remove stale .gitignore 2013-11-23 15:16:27 +01:00
Sebastien Bourdeauducq
be3b603b17 merge Mibuild into Migen 2013-11-23 10:45:15 +01:00
Sebastien Bourdeauducq
62ec66bc00 Add 'mibuild/' from commit '9d5931c969810a236de2a2713cfd5e509839d097' 
git-subtree-dir: mibuild
git-subtree-mainline: 7e4024beb3
git-subtree-split: 9d5931c969
 2013-11-23 10:34:28 +01:00
Sebastien Bourdeauducq
9d5931c969 platforms/mixxeo: update DVI input timing constraints 2013-11-19 23:15:42 +01:00
Sebastien Bourdeauducq
140ddd31a4 mixxeo: add DVI output pins 2013-09-17 18:14:41 +02:00
Sebastien Bourdeauducq
72eb523f7d Merge branch 'master' of github.com:milkymist/mibuild 2013-09-16 19:17:09 +02:00
Sebastien Bourdeauducq
df7ca037cb mixxeo: use -2 speed grade 2013-09-16 19:17:00 +02:00
Sebastien Bourdeauducq
ebe8a27de9 mixxeo: swap pairs 0 and 1 on DVI1 2013-09-14 19:36:02 +02:00
Sebastien Bourdeauducq
d57344b8ae platforms/mixxeo: add LED 2013-09-06 23:10:01 +02:00
Florent Kermarrec
9569152309 altera_quartus: fix import _Fragment 2013-08-26 20:13:30 +02:00
Sebastien Bourdeauducq
316faa7fa8 platforms/m1: resetless by default 2013-08-14 00:46:30 +02:00
Nina Engelhardt
4ebbfa63bf add mist synthesis mode to build 2013-08-12 13:13:25 +02:00
Sebastien Bourdeauducq
88611be368 xilinx_ise: cleanup 2013-08-08 00:15:35 +02:00
user
9d531ba06a Fix missing string replace. Added support for 32-bit ISE if 64-bit version is missing on 64-bit system. 2013-08-08 00:07:35 +02:00
Nina Engelhardt
6e64016885 add edif build routines 2013-08-03 10:55:12 +02:00
Sebastien Bourdeauducq
275a7ea94a Change license to BSD 2013-08-01 17:46:09 +02:00
Sebastien Bourdeauducq
702471aa3c platforms/mixxeo: new pin assignments to ease routing 2013-07-29 12:24:49 +02:00
Sebastien Bourdeauducq
f7f19b78e4 Fragment -> _Fragment 2013-07-26 15:13:24 +02:00
Sebastien Bourdeauducq
78776b4bc9 platforms/mixxeo: new pin assignments for 4 HDMI input ports 2013-07-21 15:55:31 +02:00
Sebastien Bourdeauducq
b18cffb5e8 xilinx_ise: run tools like Project Navigator does to avoid weird bitgen behavior 2013-07-04 23:49:12 +02:00
Sebastien Bourdeauducq
05bc2885e9 Call finalize() after CRG creation 2013-07-04 19:49:39 +02:00
Sebastien Bourdeauducq
71c2c5813b platforms/mixxeo: remove bank 3 DVI inputs 2013-07-04 19:27:28 +02:00
Sebastien Bourdeauducq
0883e99de3 Do not specify period constraints twice 2013-07-04 19:25:29 +02:00
Sebastien Bourdeauducq
0784cd164f Add Mixxeo platform 2013-07-04 19:23:25 +02:00
Sebastien Bourdeauducq
1f3c941a78 platforms/m1: move generic platform commands to do_finalize 2013-07-04 19:22:59 +02:00
Sebastien Bourdeauducq
7e4552bbfc lx9_microboard: improve compat with other boards 2013-06-27 19:30:57 +02:00
Robert Jordens
c1cf37f05a add Avnet Spartan6 LX9 Micrboard platform 2013-06-27 19:18:47 +02:00
Robert Jordens
e233c62d27 * generic_platform.py: add a finalize() method 
... to add e.g. timing constraints after the other modules have
had their say and when the signal names are known
 2013-06-27 19:17:02 +02:00
Sebastien Bourdeauducq
6b56428a21 Shorter multipin signal definition 2013-06-25 22:57:31 +02:00
Sebastien Bourdeauducq
953e603915 xilinx_ise: improve parameter passing 2013-06-01 17:22:57 +02:00
Sebastien Bourdeauducq
548f2685bb platform/rhino: rename ismm data out signal to locked 2013-05-30 11:06:02 +02:00
Sebastien Bourdeauducq
759858f739 Use migen.fhdl.std 2013-05-26 18:07:26 +02:00
Sebastien Bourdeauducq
e272e68fac platforms/papilio_pro: swap tx/rx to be consistent with M1 2013-05-19 20:24:47 +02:00
Sebastien Bourdeauducq
fe64ade1ac platforms/m1: add pots pins 2013-05-13 15:38:20 +02:00
Sebastien Bourdeauducq
7a2f31b2e8 platforms/papilio_pro: no reset signal by default 2013-05-07 19:10:18 +02:00
Sebastien Bourdeauducq
439f032921 crg: support for resetless system clock domain 2013-05-07 19:09:56 +02:00
Florent Kermarrec
6a4c194aab platforms: add KC705 2013-05-07 10:31:12 +02:00
Brandon Hamilton
3d0894465c mibuild: Add platform for Xilinx ML605 board 2013-05-06 14:21:56 +02:00
Sebastien Bourdeauducq
e4b0e8ed6d xilinx_ise: enable register balancing 2013-05-06 14:21:39 +02:00
Sebastien Bourdeauducq
85e06cc100 xilinx_ise: implement NoRetiming synthesis constraint 2013-04-25 14:57:45 +02:00
Sebastien Bourdeauducq
29eaf068f3 xilinx_ise: do not attempt to source settings file on Windows 2013-04-16 22:55:24 +02:00
Sebastien Bourdeauducq
31b1960188 xilinx_ise: add --no-source option to disable sourcing of ISE settings file 2013-04-16 22:39:35 +02:00
Werner Almesberger
59d64e92e8 mibuild: define memory card pins of the Milkymist One platorm 
This patch adds the memory card pins to the M1 platform definition in
mibuild.

I've tentatively named them "mmc". As far as I can tell, "MMC" is not
trademarked ("MultiMediaCard" the new "eMMC" would be), and "MMC" is
commonly used in the industry in a descriptive way to refer to this
sort of interface.

The original Verilog-based M1 calls the interface "mc", but since
several names have changed between milkymist and -ng, I thought I'd
use a more familiar name.

Usage example (clock signal divided by powers of two on the MMC TPs):
https://github.com/wpwrak/ming-ddc-debug/blob/counter-on-mmc/build.py

- Werner
 2013-04-12 09:51:57 +02:00
Sebastien Bourdeauducq
843f8a5bfc platforms: add Papilio Pro 2013-04-08 20:28:23 +02:00
Sebastien Bourdeauducq
715d332c3d crg: apply constraint to IO pins, not internal signals 2013-04-08 20:28:11 +02:00
Sebastien Bourdeauducq
8cf7c96a53 crg: use new platform.request 2013-03-26 23:08:35 +01:00
Sebastien Bourdeauducq
38e92eb92b altera_quartus: fix clock domain name 2013-03-26 23:05:46 +01:00
Sebastien Bourdeauducq
3b19dfc412 Support for platform info 2013-03-26 19:17:35 +01:00
Sebastien Bourdeauducq
74cc4d22cd generic_platform: remove obj in request + add lookup_request 2013-03-26 17:56:53 +01:00
Sebastien Bourdeauducq
003f1950cd xilinx_ise: fix clock domain names 2013-03-23 19:37:16 +01:00
Sebastien Bourdeauducq
797411c1a9 generic_platform: do not create clock domains during Verilog conversion 2013-03-18 18:44:58 +01:00
Sebastien Bourdeauducq
4bf3190244 MultiReg: remove idomain 2013-03-15 19:54:25 +01:00
Sebastien Bourdeauducq
6feb6e60b0 New clock_domain API 2013-03-15 18:46:11 +01:00
Sebastien Bourdeauducq
001beadb97 altera_quartus, de0nano: add copyright notices 2013-03-15 12:37:25 +01:00
Sebastien Bourdeauducq
f9e07b92a4 Added platform file for DE0 Nano (by Florent Kermarrec) 2013-03-15 11:41:38 +01:00
Sebastien Bourdeauducq
86d6f1d011 Added support for Altera Quartus (by Florent Kermarrec) 2013-03-15 11:32:12 +01:00
Sebastien Bourdeauducq
71c8172836 xilinx_ise/CRG_SE: reset inversion support 2013-03-15 11:31:36 +01:00
Sebastien Bourdeauducq
37d8029848 CRG: support reset inversion 2013-03-15 10:49:18 +01:00
Sebastien Bourdeauducq
24910173b7 CRG: use new Module API 2013-03-15 10:48:43 +01:00
Sebastien Bourdeauducq
c06a821452 generic_platform: implicit get_fragment 2013-03-12 16:14:13 +01:00
Sebastien Bourdeauducq
4d4d6c1f88 platforms/m1: add video mixer extension board 2013-03-05 23:03:01 +01:00
Sebastien Bourdeauducq
6a412f796e xilinx_ise: add lock cycle to bitgen 2013-03-01 11:29:40 +01:00
Sebastien Bourdeauducq
2b902fdcbd xilinx_ise: import Instance 2013-02-24 15:36:56 +01:00
Sebastien Bourdeauducq
d60ab1d215 Use new 'specials' API 2013-02-24 12:21:01 +01:00
Sebastien Bourdeauducq
56ae0f0714 xilinx_ise: disable SRL extraction on synchronizers 2013-02-23 19:43:12 +01:00
Sebastien Bourdeauducq
ef833422c7 generic_platform/get_verilog: pass additional args to verilog.convert 2013-02-23 19:42:29 +01:00
Sebastien Bourdeauducq
0321513726 corelogic -> genlib 2013-02-23 19:37:27 +01:00